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Part: UPD7554AG
Category:
Description: 4-bit Single-chip Microcomputer
Company: NEC Electronics Inc.
Datasheet: Download UPD7554AG datasheet File size : 6486 kB
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD7554A, 7554A(A)
4-BIT SINGLE-CHIP MICROCOMPUTER
DESCRIPTION
The µPD7554A is a product of the µPD7554, 7564 sub-series which is a 4-bit single-chip microcomputer with a small number of ports in a small package, which is enabled to operate even at the super-low voltage of 2.0 V so that it is optimized for handy-type systems operating with dry cells. The µPD7554A is a low-order model in the µPD7500 series (µPD7554A only). This device incorporates a serial interface, and serves as the sub-CPU for a high-order model of that series or the 8-bit microcomputer. It is optimized for distributed processing of the system. The µPD7554A has outputs to directly drive a triac and LEDs and allows selection among many types of input/ output circuits using their respective mask options, sharply reducing the number of external circuits required. Details of functions are described in the User's Manual shown below. Be sure to read in design.
µPD7554, 7564 User's Manual: IEM-1111D
FEATURES
· Range of supply voltage 7554A : 2.0 to 6.0 V 7554A(A) : 2.7 to 6.0 V · Drive with two 1.5 V manganese cells · 47 types of instructions (Subset of µPD7500H SET B) · Instruction cycle External clock : 2.86 µs (in operation at 700 kHz, 5 V) RC oscillation : 4 µs (in operation at 500 kHz, 5 V) · Program memory (ROM) capacity: 1024 × 8 bits · Data memory (RAM) capacity: 64 × 4 bits · Test source: One external source and two internal sources · 8-bit timer/event counter · 16 I/O lines (Total output current of all pins: 100 mA) · Can directly drive a triac and a LED: P80 to P83 · Can directly drive LEDs: P100 to P103 and P110 to P113 · Mask option function provided for every port · 8-bit serial interface · Standby (STOP/HALT) function · Low supply voltage data retaining function for data memory · Built-in ceramic oscillator for system clock RC Oscillation with an external resistor R (Incorporating capacitor C)
5
APPLICATION
µP D 7 5 5 4 A : Sub-CPU including handy-type system, PPC, printer, VCR, audio equipments, etc. µPD7554A(A) : Automotive and transportation equipments, etc.
The quality level and absolute maximum ratings of the µPD7554A and the µPD7554A(A) differ. Except where specifically noted, explanations here concern the µPD7554A as a representative product. If you are using the µPD7554A(A), use the information presented here after checking the functional differences.
5
The information in this document is subject to change without notice.
Document No. IC-2419C (O. D. No. IC-7835C) Date Published January 1995 P Printed in Japan
The mark 5 shows major revised points.
©
94 1989
µPD7554A, 7554A(A)
ORDERING INFORMATION
Ordering Code Package 20-pin plastic shrink DIP (300 mil) 20-pin plastic SOP (300 mil) 20-pin plastic shrink DIP (300 mil) 20-pin plastic SOP (300 mil) Quality Grade Standard Standard Special Special
5 5
µ P D 7 5 5 4 A C S -× × × µ P D 7 5 5 4 A G -× × × µ P D 7 5 5 4 A C S ( A ) -× × × µ P D 7 5 5 4 A G ( A ) -× × ×
Caution Be sure to specify a mask option when ordering this device. Remarks "×××" is a ROM code number.
Please rfer to "Quality grade on NEC Semiconductor Devices" (Document number IEI-1209) published by NEC Corporation to know the specification of quality grade on the devices and its recommended applications.
PIN CONFIGURATION (TOP VIEW)
P00/INT0 P01/SCK P02/SO P03/SI P80 P81 P82 CL2(P83) CL1 VDD
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VSS P113 P112 P111 P110 P103 P102 P101 P100 RESET
µPD7554A
2
BLOCK DIAGRAM OF µPD7554A
P01/SCK INT0
P03/SI
P02/SO
P00/INT0
CLOCK CONTROL CL
CP
TIMER/EVENT COUNTER
TEST CONTROL
SERIAL INTERFACE
PROGRAM COUNTER (10)
ALU
C
A (4)
PORT0 BUFFER
4
P00P03
GENERAL REGISTERS H (2) PROGRAM MEMORY 1024 × 8 BITS INSTRUCTION DECODER STACK POINTER (6) L (2)
PORT8 LATCH BUFFER
3
P80P82 P83 (CL2)
PORT10 LATCH BUFFER CL
4
P100P103
DATA MEMORY
SYSTEM CLOCK GENERATOR
STANDBY CONTROL
64 × 4 BITS
PORT11 LATCH BUFFER
µPD7554A, 7554A(A)
4
P110P113
CL1 CL2(P83)
VDD
VSS
RESET
3
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