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Part: UPD75P036KG

Category:
 Microcontrollers

Description: 4-bit Single-chip Microcontroller

Company: NEC Electronics Inc.

Datasheet: Download UPD75P036KG datasheet     File size : 6486 kB

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DATA SHEET
MOS Integrated Circuit
µPD75P036
4-BIT SINGLE-CHIP MICROCONTROLLER
DESCRIPTION
T h e µPD75P036 is a 4-bit signgle-chip microcontroller that replaced the µPD75028's on-chip ROM with o n e - t i m e PROM or EPROM. Because this device can operate at the same supply voltage as its mask v e r s i o n , it is suited for preproduction in development stage or small-scale production. T h e one-time PROM version is programmable only once and is useful for small-scale production of many d i f f e r e n t products and time-to-market of a new product. The EPROM version is programmable, erasable, a n d reprogrammable, and is suited for the evaluation of application systems. Detailed functions are described in the followig user's manual. Be sure to read it for designing. 5
µPD75028 User's Manual: IEU-1280
FEATURES
· ·
µ PD75028 compatible
· At full production, the µPD75P036 can be replaced with the µPD75028 which incorporates mask ROM Memory capacity · Program memory (PROM): 16256 x 8 bits · Data memory (RAM): 1024 x 4 bits
· · · ·
Internal pull-up resistors can be specified by software: Ports 0-3, 6-8 Internal pull-down resistors can be specified by software: Port 9 Open-drain input/output: Ports 4, 5, 10 Can operate at low voltage: VDD = 2.7 to 6.0 V
ORDERING INFORMATION
Part Number Package 64-pin plastic shrink DIP (750 mils) 64-pin plastic QFP (14 x 14 mm) 64-pin ceramic WQFN Internal ROM One-time PROM One-time PROM EPROM Quality Grade Standard Standard Not applicable 5
µP D 7 5 P 0 3 6 C W µP D 7 5 P 0 3 6 G C - A B 8 µP D 7 5 P 0 3 6 K G
Caution
Internal pull-up/pull-down resistors cannot be specified by mask option as for this device.
Please refer to "Quality grade on NEC Semiconductor Devices" (Document number IEI-1209) published by NEC Corporation to know the specification of quality grade on e devices and its recommended applications. The reliability of the EPROM version, µPD75P036KG, is not guaranteed when used in mass-produced application sets. Please use this device only experimentally or for evaluation during trial manufacture.
The function common to the one-time PROM and EPROM versions is referred to as PROM throughout this document. The information in this document is subject to change without notice.
Document No. U10051EJ3V0DS00 (3rd edition) (Previous No. IC-2967 Date Published September 1995 P Printed in Japan
The mark 5 shows revised points.
© NEC Corporation 1991
µPD75P036
PIN CONFIGURATIONS (Top View)
· 64-pin plastic shrink DIP (750 mils)
SB1/SI/P03 SB0/SO/P02 SCK/P01 INT4/P00 BUZ/P23 PCL/P22 PPO/P21 PTO0/P20 MAT/P103 MAZ/P102 MAI/P101 MAR/P100 RESET X1 X2 VPP XT1 XT2 VDD AVDD AVREF+ AVREFAN7 AN6 AN5 AN4 AN3/P113 AN2/P112 AN1/P111 AN0/P110 AVSS TIO/P13 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 VSS P30/MD0 P31/MD1 P32/MD2 P33/MD3 P40 P41 P42 P43 P50 P51 P52 P53 P60/KR0 P61/KR1 P62/KR2 P63/KR3 P70/KR4 P71/KR5 P72/KR6 P73/KR7 P80 P81 P82 P83 P90 P91 P92 P93 P10/INT0 P11/INT1 P12/INT2
· 64-pin plastic QFP (14 x 14 mm) · 64-pin ceramic WQFN
P50 P51 P52 P53 P60/KR0 P61/KR1 P62/KR2 P63/KR3 P70/KR4 P71/KR5 P72/KR6 P73/KR7 P80 P81 P82 P83
P43 P42 P41 P40 MD3/P33 MD2/P32 MD1/P31 MD0/P30 VSS SB1/SI/P03 SB0/SO/P02 SCK/P01 INT4/P00 BUZ/P23 PCL/P22 PPO/P21
1 48 2 47 3 46 45 4 44 5 43 6 42 7 8 41 40 9 39 10 38 11 12 37 36 13 35 14 34 15 161718 19 20 21 22 23 24 25 26 2728 29 30 31 3233
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
2
PTO0/P20 MAT/P103 MAZ/P102 MAI/P101 MAR/P100 RESET X1 X2 VPP XT1 XT2 VDD AVDD AVREF+ AVREFAN7
µPD75P036CW µPD75P036GC-AB8 µPD75P036KG
P90 P91 P92 P93 P10/INT0 P11/INT1 P12/INT2 TI0/P13 AVSS AN0/P110 AN1/P111 AN2/P112 AN3/P113 AN4 AN5 AN6
µPD75P036
PIN IDENTIFICATION
P00-P03 P10-P13 P20-P23 P30-P33 P40-P43 P50-P53 P60-P63 P70-P73 P80-P83 P90-P93 : Port 0 : Port 1 : Port 2 : Port 3 : Port 4 : Port 5 : Port 6 : Port 7 : Port 8 : Port 9 PPO AN0-AN7 AV REF+ AB REF­ AV DD AV SS V DD V SS MD0-MD3 V PP MAI MAZ MAT INT0, INT1, INT4 : External Vectored Interrupt INT2 X1, X2 XT1, XT2 MAR : External Test Input : Main System Clock Oscillation : Subsystem Clock Oscillation : Reference Integration Control : Integration Control : Autozero Control : External Comparate Timing Input : Programmable Pulse Output ··· MFT timer mode : Analog Input : Analog Reference (+) : Analog Reference (­) : Analog VDD : Analog VSS : Positive Power Supply : Ground : Mode Selection : Programming/Verifying Power Supply MFT A/D mode 5
P100-P103 : Port 10 P110-P113 : Port 11 KR0-KR7 SCK SI SO SB0, SB1 RESET TI0 PTO0 BUZ PCL Remark : Key Return : Serial Clock : Serial Input : Serial Output : Serial Bus : Reset Input : Timer Input : Programmable Timer Output : Buzzer Clock : Programmable Clock MFT: Multifunction Timer
3


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