|
Details, datasheet, quote on part number:UPD780232
| |
Datasheet text preview:
PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
µPD780232
8-BIT SINGLE-CHIP MICROCONTROLLER
DESCRIPTION
The µPD780232 is a member of the µPD780232 Subseries of the 78K/0 Series. The µPD780232 Subseries consists of products that incorporate an FIPTM controller/driver for panel control. A flash memory version, the µPD78F0233, that can operate within the same power supply voltage range as the mask ROM version, and various development tools are under development. Detailed function descriptions are provided in the following user's manuals. Be sure to read them before designing.
µPD780232 Subseries User's Manual
: U13364E
78K/0 Series User's Manual Instructions : U12326E
FEATURES
· I/O ports: 40 · Internal ROM and RAM · Internal ROM · Internal buffer RAM · FIP display RAM : 16 Kbytes : 32 bytes : 112 bytes · Internal high-speed RAM : 768 bytes · FIP controller/driver: 53 display outputs (Universal grid supported) · 8-bit resolution A/D converter: 4 channels · Serial interface: 2 channels · Timer: 4 channels · Power supply voltage: VDD = 4.5 to 5.5 V
· Minimum instruction execution time can be changed from high-speed (0.4 µs) to low-speed (6.4 µs)
APPLICATIONS
Compact-type integrated system components, separate-type system components, tuners, cassette tape decks, compact disc/mini disc players, audio amplifiers, etc.
ORDERING INFORMATION
Part Number Package 80-pin plastic QFP (14 × 14 mm)
µP D 7 8 0 2 3 2 G C -× × × - 8 B T
Remark ××× indicates the ROM code suffix.
The information contained in this document is being issued in advance of the production cycle for the device. The parameters for the device may change before final production or NEC Corporation, at its own discretion, may withdraw the device prior to its production. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. U13415EJ1V2DS00 (1st edition) Date Published November 1999 N CP(K) Printed in Japan
The mark
shows major revised points.
©
1998
µPD780232
78K/0 SERIES LINEUP
The following shows the 78K/0 Series lineup. The designations appearing inside the boxes are subseries names.
Products in mass production Products under development Control 100-pin 100-pin 100-pin 100-pin 80-pin 80-pin 80-pin 64-pin 64-pin 64-pin 64-pin 64-pin 64-pin 64-pin 42/44-pin Y subseries support I2C bus specification EMI-noise reduced version of the µ PD78078
µPD78075B µPD78078 µPD78070A µPD780058 µPD78058F µPD78054 µPD780034 µPD780024 µPD78014H µPD78018F µPD78014 µPD780001 µPD78002 µPD78083
Inverter control
µPD78078Y µPD78070AY µPD780018AY µPD780058YNote µPD78058FY µPD78054Y µPD780034Y µPD780024Y µPD78018FY µPD78014Y µPD78002Y
Timer was added to the µ PD78054 and external interface function was enhanced ROM-less versions of the µ PD78078
Serial I/O of the µPD78078Y was enhanced and only selected functions are provided
Serial I/O of the µ PD78054 was enhanced and EMI-noise reduced version EMI-noise reduced version of the µPD78054
UART and D/A converter were added to the µPD78014, and I/O was enhanced
A/D converter of the µ PD780024 was enhanced Serial I/O of the µ PD78018F was enhanced EMI-noise reduced version of the µ PD78018F Low-voltage (1.8 V) operation versions of the µ PD78014, with several ROM and RAM capacities are available A/D converter and 16-bit timer were added to the µPD78002 A/D converter was added to the µPD78002 Basic subseries for control On-chip UART, capable of operating at low voltage (1.8 V)
78K/0 Series
64-pin
µPD780988
On-chip inverter control circuit, UART. EMI-noise reduced version.
FIPTM driving 100-pin 100-pin 80-pin 80-pin 80-pin
µ PD780208 µ PD780228 µ PD780232 µ PD78044H µPD78044F
LCD driving
I/O and FIP C/D of the µPD78044F were enhanced, Display output total: 53 I/O and FIP C/D of the µPD78044H were enhanced, Display output total: 48 Panel control, on-chip FIP C/D, Display output total: 53 N-ch open-drain input/output was added to the µ PD78044F, Display output total: 34
Basic subseries for driving FIP, Display output total: 34
100-pin 100-pin 100-pin
µPD780308 µPD78064B µPD78064
µPD780308Y µPD78064Y
SIO of the µPD78064 was enhanced, and ROM and RAM capacities were expanded EMI-noise reduced version of the µ PD78064 Basic subseries for driving LCDs, on-chip UART
IEBusTM supported 80-pin
µPD78098B
IEBus controller was added to the µPD78054, EMI-noise reduced version
80-pin
Meter control µPD780973
On-chip controller/driver for operating automobile meters
Note Under planning
2
Preliminary Data Sheet U13415EJ1V2DS00
µPD780232
The major functional differences among the subseries are shown below.
Function Subseries Name Control ROM Capacity Timer 8-bit 16-bit Watch WDT 8-bit 10-bit 8-bit A/D A/D D/A -- Serial Interface I/O 88 V DD External MIN. Expansion Value 1.8 V
µPD78075B 32 K to 40 K 4 ch 1 ch 1 ch 1 ch 8 ch µP D 7 8 0 7 8 µP D 7 8 0 7 0 A
48 K to 60 K --
2 ch 3 ch (UART: 1 ch)
61 3 ch (time division UART: 1 ch) 3 ch (UART: 1 ch) 68 69
2.7 V 1.8 V 2.7 V 2.0 V
µPD780058 24 K to 60 K 2 ch µPD78058F 48 K to 60 K µP D 7 8 0 5 4 µP D 7 8 0 0 2 4 µP D 7 8 0 1 4 H µPD78018F 8 K to 60 K µP D 7 8 0 1 4 µP D 7 8 0 0 2 µP D 7 8 0 8 3
Inverter control FIP drive µPD780208 32 K to 60 K 2 ch 1 ch 1 ch 1 ch 8 ch -- -- 8 K to 32 K -- -- 1 ch -- -- 1 ch -- 8 ch -- 8 ch -- 16 K to 60 K -- 8 ch 8 ch -- --
µPD780034 8 K to 32 K
3 ch (UART: 1 ch, 51 time division 3-wire: 1 ch) 2 ch 53
1.8 V
2.7 V 1 ch 39 53 1 ch (UART: 1 ch) 3 ch (UART: 2 ch) 2 ch 1 ch 4 ch 8 ch 2 ch 1 ch 2 ch -- -- 3 ch (time division UART: 1 ch) 2 ch (UART: 1 ch) 57 2.0 V -- 33 47 74 72 40 68 2.7 V 1.8 V 4.0 V 2.7 V 4.5 V -- -- --
µP D 7 8 0 0 0 1 8 K
8 K to 16 K
µPD780988 32 K to 60 K 3 ch Note
µPD780228 48 K to 60 K 3 ch µPD780232 16 K to 24 K
--
--
µPD78044H 32 K to 48 K 2 ch 1 ch 1 ch µPD78044F 16 K to 40 K
LCD drive µPD780308 48 K to 60 K 2 ch 1 ch 1 ch 1 ch 8 ch
µP D 7 8 0 6 4 B 3 2 K µP D 7 8 0 6 4
16 K to 32 K -- -- IEBus µPD78098B 40 K to 60 K 2 ch 1 ch 1 ch 1 ch 8 ch supported Meter control
2 ch 3 ch (UART: 1 ch) -- 2 ch (UART: 1 ch)
69 56
2.7 V 4.5 V
--
µPD780973 24 K to 32 K 3 ch 1 ch 1 ch 1 ch 5 ch
Note 16-bit timer: 2 channels 10-bit timer: 1 channel
Preliminary Data Sheet U13415EJ1V2DS00
3
|
|
