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Details, datasheet, quote on part number:UPD784035Y
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Datasheet text preview:
PRELIMINARY PRODUCT INFORMATION
MOS INTEGRATED CIRCUIT
mPD784035Y,784036Y,784037Y,784038Y
16/8-BIT SINGLE-CHIP MICROCONTROLLERS
The mPD784038Y is based on the mPD784038 with an I2C bus control function appended, and is ideal for applications in audio-visual. One-time PROM and EPROM versions, such as mPD78P4038Y, that can operate in the same voltage range as the mask ROM version, and various development tools are under development. The functions are explained in detail in the following User's Manual. Be sure to read this manual when designing your system.
mPD784038, 784038Y Subseries User's Manual - Hardware: To be released soon
78K/IV Series User's Manual - Instruction: U10905E
FEATURES
78K/IV series Pin-compatible with mPD78234 subseries, PWM output: 2 outputs Standby function HALT/STOP/IDLE mode Clock division function Watchdog timer: 1 channel Clock output function Selectable from fCLK, fCLK/2, fCLK/4, fCLK/8, and fCLK/16 A/D converter: 8-bit resolution ¥ 8 channels D/A converter: 8-bit resolution ¥ 2 channels Supply voltage: VDD = 2.7 to 5.5 V
mPD784026 subseries, and mPD784038
subseries Higher internal memory capacity than mPD78234 subseries and mPD784026 subseries M i n i m u m instruction execution time: 125 ns (@ 32-MHz operation) I/O ports: 64 Timer/counter: Timer/counter ¥ 3 units Timer ¥ 1 unit Serial interface: 3 channels UART/IOE (3-wire serial I/O): 2 channels CSI (3-wire serial I/O, 2-wire serial I/O, I2C bus): 1 channel
APPLICATION FIELDS
Cellular phones, cordless phones, audio-visual systems, etc. Unless contextually excluded, references in this document to mPD784038Y mean mPD784035Y, mPD784036Y, and mPD784037Y.
The information contained in this document is being issued in advance of the production cycle for the device. The parameters for the device may change before final production or NEC Corporation, at its own discretion, may withdraw the device prior to its production.
Document No. U10741EJ1V0PM00 (1st edition) Date Published February 1996 P Printed in Japan
©
1996
mPD784035Y,784036Y,784037Y,784038Y
ORDERING INFORMATION
Part Number Package Internal ROM (Bytes) Internal RAM (Bytes)
mPD784035YGC-¥¥¥-3B9 mPD784035YGK-¥¥¥-BE9 mPD784036YGC-¥¥¥-3B9 mPD784036YGK-¥¥¥-BE9 mPD784037YGC-¥¥¥-3B9 mPD784037YGK-¥¥¥-BE9 mPD784038YGC-¥¥¥-3B9 mPD784038YGK-¥¥¥-BE9
80-pin plastic QFP (14 ¥ 14 mm) 80-pin plastic TQFP (fine pitch) (12 ¥ 12 mm) 80-pin plastic QFP (14 ¥ 14 mm) 80-pin plastic TQFP (fine pitch) (12 ¥ 12 mm) 80-pin plastic QFP (14 ¥ 14 mm) 80-pin plastic TQFP (fine pitch) (12 ¥ 12 mm) 80-pin plastic QFP (14 ¥ 14 mm) 80-pin plastic TQFP (fine pitch) (12 ¥ 12 mm)
48 K 48 K 64 K 64 K 96 K 96 K 128 K 128 K
2048 2048 2048 2048 3584 3584 4352 4352
Remark ¥¥¥ indicates a ROM code suffix.
78K/IV Series Product Development
: Under mass production : Under development
µ PD784038Y subseries
: Being planned I2C bus (×1) supporting models
µ PD784038 subseries
Standard models
80 pins, 8-bit A/D, 8-bit D/A ROM : 48K/64K/96K/128K
µ PD784026 subseries
80 pins, 8-bit A/D, 8-bit D/A ROM : none/48K/64K I2C
µ PD784208Y subseries
bus (×2) supporting models
µ PD784208 subseries
100 pins, 8-bit A/D, 8-bit D/A ROM : 96K/128K
µ PD784046 subseries
80 pins, 10-bit A/D ROM : 32K/64K
ASSP models
µ PD784915 subseries
VCR servo, 100 pins, analog amplifier ROM : 48K/62K
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mPD784035Y,784036Y,784037Y,784038Y
FUNCTIONS
Parts Number Item Number of basic instructions (mnemonics) General-purpose register Minimum instruction execution time Internal memory Memory space I/O port Total Input I/O Pins with ancillary f u n c t i o n Note ROM RAM 113 8 bits ¥ 16 registers ¥ 8 banks, or 16 bits ¥ 8 registers ¥ 8 banks (memory mapping) 125 ns/250 ns/500 ns/1000 ns (at 32 MHz) 48 KBytes 2048 Bytes 64 8 56 64 KBytes 96 KBytes 3584 Bytes 128 KBytes 4352 Bytes
mPD784035Y
mPD784036Y
mPD784037Y
mPD784038Y
1 MBytes with program and data spaces combined
Pins with pull- 54 up resistor LEDs direct drive output Transistor direct drive 24 8 4 bits ¥ 2, or 8 bits ¥ 1 Timer/counter 0: Timer register ¥ 1 Capture register ¥ 1 Compare register ¥ 2 Timer/counter 1: Timer register ¥ 1 Capture register ¥ 1 Capture/compare register ¥ 1 Compare register ¥ 1 Timer/counter 2: Timer register ¥ 1 Capture register ¥ 1 Capture/compare register ¥ 1 Compare register ¥ 1 Timer 3: Timer register ¥ 1 Compare register ¥ 1 Pulse output · Toggle output · PWM/PPG output · One-shot pulse output Pulse output · Real-time output (4 bits ¥ 2)
Real-time output port Timer/counter
Pulse output · Toggle output · PWM/PPG output
PWM output Serial interface A/D converter D/A converter Clock output Watchdog timer Standby Interrupt Source Software Maskable
12-bit resolution ¥ 2 channels UART/IOE (3-wire serial I/O) : 2 channels (on-chip baud rate generator) CSI (3-wire serial I/O, 2-wire serial I/O, I2C bus) : 1 channel 8-bit resolution ¥ 8 channels 8-bit resolution ¥ 2 channels Selectable from fCLK, fCLK/2, fCLK/4, fCLK/8, fCLK/16 (can also be used as 1-bit output port) 1 channel HALT/STOP/IDLE mode 24 (internal: 17, external: 7 (variable sampling clock input: 1)) + BRK instruction BRK instruction Internal: 16, external: 6 · 4 programmable priority levels · 3 processing styles: vectored interrupt/macro service/context switching
Non-maskable Internal: 1, external: 1
Supply voltage Package
VDD = 2.7 to 5.5 V 80-pin plastic QFP (14 ¥ 14 mm) 80-pin plastic TQFP (fine pitch) (12 ¥ 12 mm)
Note The pins with ancillary function are included in the I/O pins.
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