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Details, datasheet, quote on part number:VR4121
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Datasheet text preview:
VR 4 1 2 1 6 4 - B I T M I P S R I S C M I C R O P R O C E S S O R FOR WINDOWS CE
The 64-bit VR4121TM (µPD30121) microprocessor is a member of NEC's VR SeriesTM devices created for Windows® CE embedded consumer applications. Designed around the MIPS® RISC architecture developed by MIPS Technologies, the VR4121 offers excellent power consumption and performance in a highly integrated, low-cost system on a chip. This microprocessor is the second NEC device to use the ultra-low-power-consuming VR4120TM CPU core based on advanced 0.25-micron technology. The VR4120 CPU has an optimized five-stage pipeline, 16-KB instruction cache, 8-KB data cache, multiply-accumulate (MAC) unit, and memory management unit that enable high performance in a compact, low-cost chip. Integrated peripherals include a power management unit, direct memory access unit, interrupt control unit, timers, real-time clock, 16550-compatible serial interface, IrDA® interface, keyboard interface, touch-panel interface, host signal processing unit (software modem), and A/D and D/A converters. The VR4121 is compatible with MIPS III instruction set architecture (ISA) and MIPS16 application-specific extension (ASE). The MIPS16 ASE compatibility enables the VR4121 to incorporate 16-bit-long instructions with conventional 32-bit-long instructions, resulting in compact code size, a smaller memory requirement, and lower system cost. The VR4121 provides an easy choice for VR4111TM customers in terms of upgrade, since the VR4121 and VR4111 are fully pin compatible. The VR4121 microprocessor's high speed, compact size, and low power consumption make it ideal for use in a battery-driven, portable handheld systems.
BLOCK DIAGRAM
Software Modem
Codec
DAA
D/A Converter Osc Osc Phase Locked Loop
Host Signal Processing Unit
Audio Interface Unit General-Purpose I/O Unit Keyboard Interface LED Interface Touch-Panel Interface
Real-Time Clock Direct Memory Access Unit Deadman's Switch Unit Interrupt Control Unit Power Mgmnt Unit Cache Memory Unit
LCD Controller
VR4120 CPU (131, 168 MHz) 16K Instruction Cache 8K Data Cache
PC Card
Touch Panel
ROM/ Flash
A/D Converter 16550 Serial Interface Fast Infrared Controller
MIC
SDRAM/ EDO DRAM
Bus Control Unit
VR4121
Fast Infrared Driver RS232C Driver
97YL-0256C (10/98)
F E AT U R E S V R 4 1 2 0 CPU CORE -- MIPS III ISA-compliant -- MIPS 16 ASE-compliant for compact code density (40% denser code than MIPS32) -- Five-stage pipeline running up to 168 MHz -- Single-cycle 32-bit MAC instruction for digital signal processing operations M E M O R Y MANAGEMENT UNIT -- 32-bit physical address range of 4 GB with 40-bit virtual address space -- 32 double-entry TLBs supporting 1~256 KB page sizes -- Up to 64 MB of SDRAM/EDO/fast-page DRAM and 64 MB of SROM/flash memory/mask ROM -- Up to 66-MHz operation C A C H E MEMORY UNIT -- 16-KB direct-mapped instruction cache -- 8-KB direct-mapped data cache -- Write-back cache for reducing store operations B U S CONTROL UNIT -- 32-bit and 16-bit addressing -- Dynamic bus sizing; subset of ISA bus P O W E R MANAGEMENT UNIT WITH F O U R POWER-SAVING MODES -- Full speed -- Standby -- Suspend -- Hibernate C L O C K GENERATOR UNIT -- Built-in PPL for frequency multiplication -- External bus frequency of 16/33 MHz S E R I A L INTERFACE UNIT -- 16550-compatible -- RS-232C compliant -- Up to 115 kbps -- Separate debugging serial port O T H E R PERIPHERALS -- Real-time clock with four built-in timers -- Interrupt control unit with internal and external interrupts -- DMA address unit and DMA control unit with five different channels -- General-purpose I/O unit with 49 general-purpose I/O pins -- 96-key keyboard and touch-panel interface -- 10-bit A/D converter for touch-pannel and audio input -- Fast IR unit: 0.5 to 4 Mbps IrDA 1.1 standard communication -- Audio interface unit and 10-bit D/A converter for audio output -- Host signal processing unit with glueless interface to telecom codec for software modem implementation A C / D C SPECIFICATIONS -- 131 and 168 MHz maximum frequency -- 2.5- and 3.3-volt operation -- 131 MHz at 300-mW typical power consumption (target specification) -- 168 MHz at 385-mW typical power consumption (target specification) PA C K A G E -- Compact size: 16 x 16 x 1.3 mm -- 224-pin FPBGA -- VR4102TM and VR4111 pin compatibility
O R D E R I N G I N F O R M AT I O N PA R T NUMBER µPD30121S1-131-3C µPD30121S1-168-3C PA C K A G E 224-pin FPBGA 224-pin FPBGA M A X I M U M OPERATING FREQUENCY 131 MHz 168 MHz
E X A M P L E H A N D H E L D P C A P P L I C AT I O N W I T H V RC4 1 7 1 A
VRC4171A
SDRAM Software Modem Codec DAA 32-bit 16-bit ROM Video RAM LCD Control PC Card Control PC Card LCD Panel
VR4121
Codec I/F Host Signal Processing Bus Control Power Management DMA Control Interrupt Control Audio Interface D/A Conv.
VR4120 168 MHz IR LED A/D Converter Touch Panel Control Key Scanner Real-Time Clock w/ Timers Serial Interface Fast Infrared Controller
Clock Generator
GPIO
Port Control
RS232 Driver 96-Key Scan Keyboard
PC Connect
Touch Panel MIC
97YL-0257C (10/98)
VR 4 1 0 2 , VR 4 1 1 1 , A N D VR 4 1 2 1 C O M P A R I S O N
CPU Max. Pipeline Clock Cache Size Performance Instruction Set MAC Instruction Operating Voltage Integrated Peripherals Memory Interface Power Consumption Package Process Technology
VR4102 VR4100 54 MHz Instruction: 4KB/Data: 1KB 60 Dhrystone MIPS MIPS III 16-bit 3.3 V Same 32 MB DRAM 32 MB ROM 250 mW 216-pin LQFP 224-pin FPBGA 0.35-micron UC1 process
VR4111 VR4110 90 MHz Instruction: 16KB/Data: 8KB 115 Dhrystone MIPS MIPS III, 16 16-bit 2.5 V (core); 3.3 V (I/O) Same 64 MB DRAM 64 MB ROM 200 mW 224-pin FPBGA 0.25-micron UC2 process
V R4 1 2 1 VR4120 168 MHz Instruction: 16KB/Data: 8KB 224 Dhrystone MIPS MIPS III, 16 32-bit 2.5 V (core); 3.3 V (I/O) Same 64 MB DRAM (SDRAM) 64 MB ROM 385 mW 224-pin FPBGA 0.25-micron UR2 process
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