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Details, datasheet, quote on part number:NJG1512HD3
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Datasheet text preview:
NJG1512HD3 SPDT SWITCH GaAs MMIC
nGENERAL DESCRIPTION NJG1512HD3 is a GaAs SPDT switch IC featuring high isolation and low insertion loss. This switch allows low operating voltage from 2.5V at the wide frequency range from 1MHz to 3GHz. The ultra small & ultra thin USB6-D3 package is applied. nFEATURES lSingle, low voltage control lHigh isolation lLow insertion loss lLow current consumption lUltra small & ultra thin package nPIN CONFIGURATION
HD3 Type (TOP VIEW)
nPACKAGE OUTLINE
+2.5~+5.5V 44dB typ. @f=0.1~2GHz 0.6dB typ. @f=1.0GHz
1.0dB typ. @f=2.0Ghz
2uA typ
USB6-D3 (Package size: 2.0x1.8x0.8mm)
1
6
Pin Connection
1.VCTL2 2.PC 3.VCTL1 4.P1 5.GND 6.P2
2
5 4
3
nTRUTH TABLE
"H"=VC TR (H), "L"=VC TR (L)
VCT R1 VCT R2 PC-P1 PC-P2
H L OFF ON
L H ON OFF
-1-
NJG1512HD3
nABSOLUTE MAXIMUM RATINGS (Ta=25°C, Zs=Zl =50 ) PARAMETER Input Power Control Voltage Power Dissipation Operating Temp. Storage Temp. SYMBOL CONDITIONS Pi n VCTL=0V/2.7V VC T R PD To p r Tstg RATINGS 27 6.0
200
UNITS dBm V mW °C °C
-20~+85 -40~+150
nELECTRICAL CHARACTERISTICS (TEST CIRCUIT : VCTL= 0/2.7V, Zs=Zo=50 , Ta=25°C) PARAMETER Control voltage (L) Control voltage (H) Control current Insertion loss 1 Insertion loss 2 Isolation 1 Isolation 2 Pin at 1dB compression point VSWR Switching time SYMBOL
VC TL (L) VC TL (H) IC TL
CONDITIONS
MIN -0.2 2.5 -
TYP 0 2.7 2.0
0.6 1.0 44 44
MAX 0.2 5.5 4.0
1.0 1.2 -
UNITS V V uA dB dB dB dB dBm
LOSS1 LOSS2 ISL1 ISL2 P-1dB VSWR TSW
f=1.0GHz, Pi n =0dBm f=2.0GHz, Pi n =0dBm f=1.0GHz, Pi n =0dBm f=2.0GHz, Pi n =0dBm f=2.0GHz f=0.1~2.5GHz, ON STATE f=0.1~2.5GHz
41 41
19.0 -
22.0 1.2 8
1.8 -
ns
-2-
NJG1512HD3
nTERMINAL INFORMATION No. 1 SYMBOL VCTL1 EXPLANATION Control port 1. The voltage of this port controls PC to P1 state. The `ON' and `OFF' state is toggled by controlling voltage of this terminal such as high-state (2.5~5.5V) or low-state (-0.2~+0.2V). The voltage of 3rd pin has to be set to opposite state. The bypass capacitor has to be chosen to reduce switching speed delay from 10pF~1000pF range. Common RF port. In order to block the DC bias voltage of internal circuit, an external capacitor is required. (1~500MHz: 1uF, 0.5~2.5GHz: 56pF) Control port 2. The voltage of this port controls PC to P1 state. The `ON' and `OFF' state is toggled by controlling voltage of this terminal such as high-state (2.5~5.5V) or low-state (-0.2~+0.2V). The voltage of 1st pin has to be set to opposite state. The bypass capacitor has to be chosen to reduce switching speed delay from 10pF~1000pF range. RF port. This port is connected with PC port by controlling 1st pin (VCTL (H)) to 2.5~5.5V and 3rd pin (VCTL (L)) to -0.2~+0.2V. An external capacitor is required to block the DC bias voltage of internal circuit. (1~500MHz: 1uF, 0.5~2.5GHz: 56pF) Ground terminal. Please connect this terminal with ground plane as close as possible for excellent RF performance. RF port. This port is connected with PC port by controlling 3rd pin (VCTL (H)) to 2.5~5.5V and 1st pin (VCTL (L)) to -0.2~+0.2V. An external capacitor is required to block the DC bias voltage of internal circuit. (1~500MHz: 1uF, 0.5~2.5GHz: 56pF)
2
PC
3
VCTL2
4 5 6
P1 GND P2
-3-
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