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Details, datasheet, quote on part number:NJU39612
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| Part: | NJU39612 |
| Category: | Power Management => Motor Controller/Drivers => Stepper Motor controller/driver |
| Description: | Microstepping Motor Controller<br>with Dual DAC |
| Company: | NJR Corporation |
| Datasheet: | Download NJU39612 datasheet File size : 84 kB |
| Request For quote: | Find where to buy NJU39612
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Datasheet text preview:
NJU39612
MICROSTEPPING MOTOR CONTROLLER WITH DUAL DAC
s GENERAL DESCRIPTION NJU39612 is a dual 7-bit+sign; Digital-to-Analog Converter (DAC) developed to be used in micro stepping applications together with the dual stepper motor driver. The NJU39612 has a set of input registers connected to an 8-bit data port for easy interfacing directly to a microprocessor. Two registers are used to store the data for each seven-bit DAC, the eighth bit being a sign bit (sign/magnitude coding).
s PACKAGE OUTLINE
NJU39612E2
s FEATURES · Analog control voltages from 3V down to 0.0V · High-speed microprocessor interface · Full -scale error · Fast conversion speed · Package EMP20 ±1 LSB 3 µs
· Matches the dual stepper motor drivers
s BLOCK DIAGRAM
V DD
V Ref
NJU39612
WR Sign 1
E1 CS C
DA- Data 1
E D D/A
R
DA 1
A0
E2 DA D/A
DA- Data 2
2
E D7 - D0 C D
R
POR RESET
R
Sign 2
V ss
Figure 1. Block Diagram
NJU39612
s PIN CONFIGURATION
Vref 1 DA1 2 Sign1 3 VDD 4 WR 5 D7 6 D6 7 D5 8 D4 9 D3 10
20 Reset 19 DA2 18 Sign2 17 Vss
NJU39612E2
16 CS 15 NC 14 A0 13 D0 12 D1 11 D2
Figure 2. Pin configuration
s PIN DESCRIPTION
Refer to figure 2.
EMP Symbol Description
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
VRef DA1 Sign1 VDD WR D7 D6 D5 D4 D3 D2 D1 D0 A0 NC CS VSS Sign2 DA2 Reset
Voltage reference supply pin, 2.5 V nominal (3.0 V maximum) Digital-to-Analog 1, voltage output. Output between 0.0 V and Vref - 1 LSB. Sign 1, TTL/CMOS level. To be connected directly to NJM377x phase input. Databit D7 is transfered non inverted from NJU39612 data input. Voltage Drain-Drain, logic supply voltage. Normally +5 V. Write, TTL/CMOS level, input for writing to internal registers. Data is clocked into flip flops on positive edge. Data 7, TTL/CMOS level, input to set data bit 7 in data word. Data 6, TTL/CMOS level, input to set data bit 6 in data word. Data 5, TTL/CMOS level, input to set data bit 5 in data word. Data 4, TTL/CMOS level, input to set data bit 4 in data word. Data 3, TTL/CMOS level, input to set data bit 3 in data word. Data 2, TTL/CMOS level, input to set data bit 2 in data word. Data 1, TTL/CMOS level, input to set data bit 1 in data word. Data 0, TTL/CMOS level, input to set data bit 0 in data word. Address 0, TTL/CMOS level, input to select data transfer, A0 selects between cannel 1 (A0 = LOW) and channel 2 (A0 = HIGH). Not connected Chip Select, TTL/CMOS level, input to select chip and activate data transfer from data inputs. LOW level = chip is selected. Voltage Source-Source. Ground pin, 0 V reference for all signals and measurements unless otherwise noted. Sign 2. TTL/CMOS level. To be connected directly to NJM377x phase input. Data bit D7 is transfered non-inverted from NJU39612 data input. Digital-to-Analog 2, voltage output. Output between 0.0 V and Vref - 1 LSB. Reset, digital input resetting internal registers. HIGH level = Reset, VRes 3.5 V = HIGH level. Pulled low internally.
NJU39612
s DEFINITION OF TERMS Resolution Resolution is defined as the reciprocal of the number of discrete steps in the DAC output. It is directly related to the number of switches or bits within the DAC. For example, NJU39612 has 27, or 128, output levels and therefor has 7 bits resolution. Remember that this is not equal to the number of microsteps available. Linearity Error Linearity error is the maximum deviation from a straight line passing through the end points of the DAC transfer characteristic. It is measured after adjusting for zero and full scale. Linearity error is a parameter intrinsic to the device and cannot be externally adjusted. Power Supply Sensitivity Power supply sensitivity is a measure of the effect of power supply changes on the DAC full-scale output. Settling Time Full-scale current settling time requires zero-to-full-scale or full-scale-to-zero output change. Settling time is the time required from a code transition until the DAC output reaches within ± 1/2LSB of the final output value. Full-scale Error Full-scale error is a measure of the output error between an ideal DAC and the actual device output. Differential Non-linearity The difference between any two consecutive codes in the transfer curve from the theoretical 1LSB, is differential non-linearity Monotonic If the output of a DAC increases for increasing digital input code, then the DAC is monotonic. A 7-bit DAC which is monotonic to 7 bits simply means that increasing digital input codes will produce an increasing analog output. NJU39612 is monotonic to 7 bits. s FUNCTIONAL DESCRIPTION Each DAC channel contains one register and a D/A converter. A block diagram is shown on the first page. The sign outputs generate the phase shifts, i.e., they reverse the current direction in the phase windings. Data Bus Interface NJU39612 is designed to be compatible with 8-bit microprocessors such as the 6800, 6801, 6803, 6808, 6809, 8051, 8085, Z80 and other popular types and their 16/32 bit counter parts in 8 bit data mode. The data bus interface consists of 8 data bits, write signal, chip select, and two address pins. All inputs are TTL-compatible (except reset). The address pin control data transfer to the two internal D-type registers. Data is transferred according to figure 7 and on the positive edge of the write signal.
Output
Output
Output Actual Gain error Correct Endpoint non-linearity
More than 2 bits
Less than 2 bits
Negative difference
Positive difference
Offset error
Input
Input
Full scale
Input
Figure 3. Errors in D/A conversion. Figure 4. Errors in D/A conversion. Differential non-linearity of more than Differential non-linearity of less than 1 bit, output is non-monotonic. 1 bit, output is monotonic.
Figure 5. Errors in D/A conversion. Non-linearity, gain and offset errors.
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