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Details, datasheet, quote on part number:NJU8711V
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| Part: | NJU8711V |
| Category: | Multimedia => Audio => Amplifiers => Power Amplifiers => Class D Amplifier |
| Description: | 3V Operation Switching Driver For Class D Amplifier |
| Company: | NJR Corporation |
| Datasheet: | Download NJU8711V datasheet File size : 89 kB |
| Request For quote: | Find where to buy NJU8711V
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Datasheet text preview:
NJU8711
PRELIMINARY
3V Operation Switching Driver for Class D Amplifier
! GENERAL DESCRIPTION
The NJU8711 is a Switching Driver for class D Amplifier including BEEP and BPZ (Bipolar Zero) output circuits. It converts 1bit digital signal input, such as PWM or PDM signal, to analog signal output with simple external LC low-pass filter. The NJU8711 realizes very high power-efficiency by class D operation. Therefore, It is suitable for portable audio set and others.
! PACKAGE OUTLINE
NJU8711V
! FEATURES
# # # # # # # 2-channel 1bit Audio Signal Input Standby(Hi-Z), BPZ Control Internal BPZ Charger Beep Function Operating Voltage : 2.0V to 3.6V CMOS Technology Package Outline : SSOP10
! PIN CONFIGURATION
EN1 MCK VDD BEEP EN2 1 2 3 4 5 10 9 8 7 6 OUT 2 IN2 VSS IN1 OUT1
! BLOCK DIAGRAM
VDD VSS
BPZ Output
IN1
OUT1
BEEP
IN2
Output Control BPZ Output
OUT2
MCK
EN1
EN2
-1-
NJU8711
! TERMINAL DESCRIPTION
No. 3 8 2 1 5 7 9 4 SYMBOL VDD VSS MCK EN1 EN2 IN1 IN2 BEEP I/O I I I I Function Power Supply, VDD=3V Power GND, VSS=0V Master Clock Input Terminal
The condition of the data input terminal is fetched with the rising edge of this signal.
Output Control Terminal Output circuit is selected by the condition of this terminal. Audio Signal Input Terminal 1-bit Audio Signal inputs into this terminal. Beep Signal Input Terminal Beep signal inputs into this terminal. Output Terminal · When Output Terminal selects Audio Signal, IN1 terminal input data outputs from OUT1 terminal and IN2 terminal input data outputs from OUT2 terminal. · When Output Terminal selects Beep Signal, BEEP terminal input data outputs from OUT1 and OUT2 terminals.
6 10
OUT1 OUT2
O
! INPUT TERMINAL STRUCTURE
VDD
Input Terminal
Inside Circuit
VSS
-2-
NJU3555 NJU8711
! FUNCTIONAL DESCRIPTION
(1) Signal Output PWM signals of L channel and R output from OUT1 and OUT2 terminals respectively. These signals are converted to analog signal by external 2nd-order or over LC filter. The output driver power supplied from VDD and VSS are required high response power supply against voltage fluctuation like as switching regulator because Output THD is effected by power supply stability. (2) Master Clock Master clock (MCK) synchronizes the Audio signal inputs (IN1 and IN2). The setup time and the hold time should be kept in the AC characteristics because IN1 and IN2 are fetched with the rising edge of MCK. MCK requires jitter-free or jitter as small as possible because the jitter downs S/N ratio. OUT1 and OUT2 occur the pop noise when MCK is stopped in operation without standby mode. Therefore, the standby mode should be set before MCK stop. (3) Output Control Output circuit is selected by the conditions of EN1 and EN2 terminals. EN2 0 0 1 1 EN1 0 1 0 1 Output State of OUT1 & OUT2 Standby(High impedance) Audio Signal Output BPZ Output Beep Signal Output
(4) Beep Function The beep signal must be input before the rising edge of EN2 signal and must be stopped after the falling edge of EN2 signal. EN1 EN2 MCK BEEP
Audio Signal Output Beep Signal Output Audio Signal Output
-3-
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