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Details, datasheet, quote on part number:NJU8713
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| Part: | NJU8713 |
| Category: | Multimedia => Audio => Amplifiers => Power Amplifiers => Class D Amplifier |
| Description: | 2V Operation Switching Driver For Class D Amplifier |
| Company: | NJR Corporation |
| Datasheet: | Download NJU8713 datasheet File size : 100 kB |
| Request For quote: | Find where to buy NJU8713
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Datasheet text preview:
NJU8713
PRELIMINARY
2V Operation Switching Driver for Class D Amplifier
! GENERAL DESCRIPTION
The NJU8713 is a Switching Driver for a class D Amplifier including Separated Power Source terminals between Input and Output, BEEP and BPZ (Bipolar Zero) output circuits. It converts 1bit digital signal input, such as PWM or PDM signal, to an analog signal output through a simple external LC low-pass filter. The NJU8713 realizes very high power-efficiency because of the class D operation. Therefore, it is suitable for portable audio set and others.
! PACKAGE OUTLINE
NJU8713V
! FEATURES
# # # # # # # # 2-channel 1bit Audio Signal Input Standby(Hi-Z), BPZ Control Internal BPZ Charger Beep Function Operating Voltage : 1.7V to 2.7V Driving Voltage : 1.7V to VDD CMOS Technology Package Outline : SSOP14
! PIN CONFIGURATION
MCK VSS IN1 EN1 VSSO OUT 1 VDDO 1 2 3 4 5 6 7 14 13 12 11 10 9 8 BEEP VDD IN2 EN2 VSSO OUT 2 VDDO
! BLOCK DIAGRAM
VDD VSS
BPZ Output
VDDO
VSSO
IN1
OUT1
BEEP
IN2
Output Control BPZ Output
OUT2
MCK
EN1
EN2
-1-
NJU8713
! TERMINAL DESCRIPTION
No. 13 2 7 8 5 10 1 4 11 3 12 14 SYMBOL VDD VSS VDDO VSSO MCK EN1 EN2 IN1 IN2 BEEP I/O Function Operation Power Supply, VDD=2V Operation Power GND, VSS=0V Driving Power Supply, VDDO=2V Terminal No.7 and No.8 should be connected to the same electric potential. Driving Power GND, VSSO=0V Terminal No.5 and No.10 should be connected to the same electric potential. Master Clock Input Terminal
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I I I I
The condition of the data input terminal is fetched with the rising edge of this signal.
Output Control Terminal Output circuit is selected by the condition of this terminal. Audio Signal Input Terminal 1-bit Audio Signal inputs into this terminal. Beep Signal Input Terminal Beep signal inputs into this terminal. Output Terminal · When Output Terminal selects Audio Signal, IN1 terminal input data outputs from OUT1 terminal and IN2 terminal input data outputs from OUT2 terminal. · When Output Terminal selects Beep Signal, BEEP terminal input data outputs from OUT1 and OUT2 terminals.
6 9
OUT1 OUT2
O
! INPUT TERMINAL STRUCTURE
VDD
Input Terminal
Inside Circuit
VSS
-2-
NJU8713 NJU3555
! FUNCTIONAL DESCRIPTION
(1) Signal Output PWM signals of L channel and R output from OUT1 and OUT2 terminals respectively. These signals are converted to analog signal by external 2nd-order or over LC filter. The output driver power supplied from VDDO and VSSO are required high response power supply against voltage fluctuation like as switching regulator because Output T.H.D is effected by power supply stability. (2) Master Clock Master clock (MCK) synchronizes the Audio signal inputs (IN1 and IN2). The setup time and the hold time should be kept in the AC characteristics because IN1 and IN2 are fetched with the rising edge of MCK. MCK requires jitter-free or jitter as small as possible because the jitter downs S/N ratio. Therefore, OUT1 and OUT2 occur the pop noise when MCK is stopped in operation without standby mode. the standby mode should be set before MCK stop. (3) Output Control Output circuit is selected by the conditions of EN1 and EN2 terminals. EN2 0 0 1 1 EN1 0 1 0 1 Output State of OUT1 & OUT2 Standby(High impedance) Audio Signal Output BPZ Output Beep Signal Output
(4) Beep Function The beep signal must be input before the rising edge of EN2 signal and must be stopped after the falling edge of EN2 signal. EN1 EN2 MCK BEEP
Audio Signal Output Beep Signal Output Audio Signal Output
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