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Details, datasheet, quote on part number:NRF401-EVKIT
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Datasheet text preview:
PRODUCT SPECIFICATION
433MHz Single Chip RF Transceiver
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· · · · · · · · · True single chip FSK transceiver Few external components required No set up or configuration No coding of data required 20kbit/s data rate 2 channels Wide supply range Very low power consumption Standby mode
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· · · · · · · · · Alarm and Security Systems Automatic Meter Reading (AMR) Home Automation Remote Control Surveillance Automotive Telemetry Toys Wireless Communication
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nRF401 is a true single chip UHF transceiver designed to operate in the 433MHz ISM (Industrial, Scientific and Medical) frequency band. It features Frequency Shift Keying (FSK) modulation and demodulation capability. nRF401 operates at bit rates up to 20kbit/s. Transmit power can be adjusted to a maximum of 10dBm. Antenna interface is differential and suited for low cost PCB antennas. nRF401 features a standby mode which makes power saving easy and efficient. nRF401 operates from a single +3-5V DC supply. As a primary application, nRF401 is intended for UHF radio equipment in compliance with the European Telecommunication Standard Institute (ETSI) specification EN 300 220-1 V1.2.1.
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Frequency, Channel#1/Channel#2 Modulation Frequency deviation Max. RF output power @ 400, 3V Sensitivity @ 400, BR=20 kbit/s, BER<10-3 Maximum bit rate Supply voltage Receive supply current Transmit supply current @ -10 dBm output power Standby supply current
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433.93 / 434.33 FSK ±15 10 -105 20 2.7 5.25 250* 8 8
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MHz kHz dBm dBm kbit/s V µA mA µA
Table 1. nRF401 quick reference data
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20 pin SSOIC Evaluation kit with nRF401 IC
Table 2. nRF401 ordering information.
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The PWR_UP pin is used for power duty cycling. The duty-cycle is 2 % with a period of 200msec.
Vestre Rosten 81, N-7075 Tiller, Norway
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Nordic VLSI ASA Revision: 1.6
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Phone +4772898900
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Fax +4772898989 February 2002
PRODUCT SPECIFICATION
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DOUT TXEN CS DIN DEM LNA
10
19 12 9
16
ANT1 ANT2
15
PWR_UP
18
OSC
PLL
VCO
PA
1
20
4
5
6
11
RF_PW R
VCO INDUCTOR
REFERENCE
LOOP FILTER
Figure 1. nRF401 block diagram with external components.
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Crystal oscillator input Power supply (+3-5V DC) Ground (0V) Loop filter External inductor for VCO External inductor for VCO Ground (0V) Power supply (+3-5V DC) Data input Data output Transmit power setting Channel selection CS="0" 433.93MHz (Channel#1) CS="1" 434.33MHz (Channel#2) Power supply (+3-5V DC) Ground (0V) Antenna terminal Antenna terminal Ground (0V) Power on/off PWR_UP = "1" Power up (Operating mode) PWR_UP = "0" Power down (Standby mode) Transmit enable TXEN = "1" Transmit mode TXEN = "0" Receive mode Crystal oscillator output
XC1 VDD VSS FILT1 VCO1 VCO2 VSS VDD DI N DOUT RF_PWR CS
Input Power Ground Input Input Input Ground Power Input Output Input Input
13 14 15 16 17 18
VDD VSS ANT2 ANT1 VSS PWR_UP
Power Ground Input/Output Input/Output Ground Input
19
T XEN
Input
20
XC2
Output
Table 3. nRF401 pin functions.
Nordic VLSI ASA Revision: 1.6 Vestre Rosten 81, N-7075 Tiller, Norway QhtrÃ!Ãsà &
Phone +4772898900
- Fax +4772898989 February 2002
PRODUCT SPECIFICATION
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Conditions: VDD = +3V DC, VSS = 0V, TA= -25°C to +85°C
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Supply voltage 2.7 3 5.25 V Ground 0 V Total current consumption Receive mode 11 mA Transmit mode @ -10 dBm RF power 8 mA Stand by mode 8 µA 10 dBm Max. RF output power @ 400 load Logic "1" input voltage VDD V 0.7VDD Logic "0" input voltage 0 V 0.3VDD Logic "1" output voltage (IOH = - 1.0mA) VDD V 0.7VDD Logic "0" output voltage (IOL = 1.0mA) 0 V 0.3VDD Logic "1" input current (VI = VDD) +20 µA Logic "0" input current (VI = VSS) -20 µA Channel#1 frequency 433.93 MHz Channel#2 frequency 434.33 MHz Dynamic range 90 dB Modulation type FSK Frequency deviation kHz ±15 IF frequency 400 kHz IF bandwidth 65 85 kHz Crystal frequency 4 .0 MHz ppm Crystal frequency stability requirement 1) ±45 Loop filter voltage 3) 0.9 1 .1 1.3 V -105 dBm Sensitivity @ 400,BR=20 kbit/s, BER < 10-3 Bit rate 0 20 kbit/s Recommended antenna port differential impedance 400 Spurious emission Compliant with EN 300-220-1 V1.2.1 2)
Table 4. nRF401 electrical specifications.
1)
Maximum 5dB sensitivity degradation at temperature extremes. See also page 11. With a PCB loop antenna or a differential to single ended matching network to a 50 antenna. 3) See also page 9, Loop filter.
2)
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6XSSO\ YROWDJHV VDD ........- 0.3V to +6V VSS ........ 0V ,QSXW YROWDJH VI ..... - 0.3V to VDD + 0.3V 2XWSXW YROWDJH VO .... - 0.3V to VDD + 0.3V 3RZHU GLVVLSDWLRQ PD (TA=25°C) ... 250mW 7HPSHUDWXUHV Operating Temperature.... -25°C to +85°C Storage Temperature...... -40°C to +125°C
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lectrostatic Sensitive Device Observe Precaution for handling
Nordic VLSI ASA Revision: 1.6
Vestre Rosten 81, N-7075 Tiller, Norway QhtrÃ"Ãsà &
Phone +4772898900
- Fax +4772898989 February 2002
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