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Part: MSM6782-01RS
Category:
Microcontrollers
Description: Real-time Clock
Company: Oki Semiconductor
Datasheet: Download MSM6782-01RS datasheet File size : 439 kB
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Datasheet text preview:
MSM6782-01
¡ Semiconductor MSM6782-01
REAL TIME CLOCK
¡ Semiconductor
GENERAL DESCRIPTION
The MSM6782 - 01 is a CMOS Serial Interface Real Time Clock/Calendar. The serial interface that can be controlled by mere 3 signal lines has minimized the number of CPU terminals required . The MSM6782 - 01 provides 30-second adjustment, oscillation stop detection, and periodic flag setting and signal output in 4 diferent cycle periods. The clock ranges are seconds, minutes, hours, days, months, years, and days of the week. The interface supply voltage is 2.7V to 5.5V and the clock supply voltage is 2.0V to 5.5V. The MSM6782 - 01 comes in an 8-pin DIP package or an 8-pin SOP package. The MSM6782 - 01 is highly integrated and is suitable for use in a variety of portable applications.
FEATURES
· · · · · · · · · · · · Real time clock providing seconds, minutes, hours, days, months, and days of the week. Serial interface controlled by 3 signal lines A periodic interrupt output in 4 different cycle periods (or periodic waveform output) Automatic leap year calendar 30-second adjustment controlled by software Stop and restart of clock Wide range of interface power supply: 2.7V to 5.5V Wide range of clock power supply: 2.0V to 5.5V 32.768kHz external quart crystal Low current consumption 8-pin plastic DIP (DIP8-P-300) (MSM6782-01RS) 8-pin plastic SOP (SOP8-P-250-K) (MSM6782-01MS-K)
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¡ Semiconductor
MSM6782-01
BLOCK DIAGRAM
XT XT STD.P OSC
Clock/calendar registers
Control registers (CD, CE, CF)
Decoder
DATA I/O CLK CE
Data buffer
Address counter VDD VSS
PIN CONFIGURATION
STD.P 1 DATA I/O 2 CLK 3 CE 4
8 VDD 7 XT 6 XT 5 VSS
STD.P 1 DATA I/O 2 CLK 3 CE 4
8 VDD 7 XT 6 XT 5 VSS
8-Pin Plastic DIP Note : The actual type name is displayed as 6782-01.
8-Pin Plastic SOP Note : The actual type name is displayed as 82-01.
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MSM6782-01
¡ Semiconductor
PIN DESCRIPTION
· STD.P (Pin No. 1) Periodic output of N-CH OPEN DRAIN type or interrupt signal output of N-CH OPEN DRAIN type for the CPU. The periodic output is used to check the reference signal and oscillation frequency. This pin is set as periodic output or interrupt signal output by writing "1" or "0" to the INT/ STND bit. This output is not inhibited by CE. For more information, see "FUNCTIONAL DESCRIPTION OF REGISTERS". · DATA I/O (Pin No.2) Input/output pin for setting of WRITE mode or READ mode, writing of addresses, or writing/reading of data. This pin is used as an input or output pin in high impedance state depending on whether WRITE mode or READ mode is selected in the first 8-bit data cycle after the rising of the CE input pulse. · CLK (Pin No. 3) Shift clock input pin. Data is taken in on the rising edge of a shift clock pulse when in WRITE mode and data is output when in READ mode. · CE (Pin No. 4) Chip enable input pin. "H" level on this pin means "enable". When this pin is low, the DATA I/O pin goes into high impedance state, and DATA I/O and CLK are disabled inside the LSI and current stops flowing through those pins. "L" level on this pin forces the TEST and REST bits of the CF registers and the fr flag to be set to "0". When turning the power ON, set this pin to "L" level. · XT, XT (Pin Nos. 7 and 6) 32.768kHz crystal is to be connected to these pins.
XT C1 VDD C2 XT MSM6782-01 XT
When an external clock is used, it is to be input from XT, while XT should be left open. The oscillation crystal and capacitors should be placed as close to the IC as possible. The oscillation circuit and other signal lines on any side of the LSI should be distant from each other. · VDD, VSS (Pin No.5) Power supply pins. VDD is used for positive supply and VSS is for negative supply. 122
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