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Details, datasheet, quote on part number:W812-F
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Datasheet text preview:
Technical Brief
O K I AS I C PR O S D U C T
W812 IEEE 1394 Controller 0.35 ตm Technology Mega Macrofunction
November 1997
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Contents Description....... 1 Features ............1 Signal Descriptions ........4 Functional Description ...........5 Functional Modules ..........5 Data Path Interface .....5 Asynchronous Transfer Request Block ..........5 Isochronous Transfer Request Block ........5 Read-Write Request Block .......5 Annex J Request Block ..............5 Transmitter and Receiver Block .......5 Byte-wide Serializer and Deserializer ............6 Quadlet Serializer and Deserializer ..........6 Quadlet Buffer ............6 Link Core Controller State Machine .........6 CRC Generator and Checker ............6
Oki Semiconductor
W812 IEEE 1394 Link Layer Controller
0.35 ตm Technology Mega Macrofunction DESCRIPTION
The W812, Oki Semiconductor's 1394 Link Layer Controller, is IEEE 1394-1995 compliant and features an embedded high-performance application bus interface. This device performs data packaging according to the IEEE 1394-1995 Standard, and bidirectional asynchronous/isochronous data transfers to/from an IEEE 1394 serial bus physical layer (PHY) device. The W812 is optimized for use as a peripheral link layer controller. The application bus interface, which transfers data between a FIFO and the host controller, is designed for highly efficient transport. Oki also provides an optional FIFO controller, the W812-F to readily interface with the W812. Oki's W812 accommodates different application needs by using a flexible architecture which to support both asynchronous and isochronous data transfers or only asynchronous data transfers. This technology give system designers the maximum flexibility in their design.
FEATURES
ท Compliant with IEEE 1394-1995 Standard Link Layer Controller ท Compatible with Texas Instruments' Physical Layer Controllers ท Offers programmable FIFO channel for asynchronous and isochronous transmission and general reception ท Supports transfer rates of 100, 200, and 400 Mbps ท Uses flexible architecture to support both asynchronous and isochronous data transfers or only asynchronous data transfers ท Offers high performance application bus interface ท Has 32-bit cyclic redundancy check (CRC) for transmission and reception of 1394 packets
Recommended Operating Conditions (VSS = 0 V)
Parameter Power supply voltage Operating temperature Symbol VDD Tj Min. 2.7 -40 Typ. 3.3 +25 Max. 3.6 +85 Unit V ฐC
Mega Macrofunction Characteristics
Mega Macrofunction W812 Description IEEE 1394 Link Layer Controller Logic Gate Count 12K Logic Pin Count 95
Oki Semiconductor
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