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Details, datasheet, quote on part number:OV9620
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Datasheet text preview:
Omni
General Description
ision
TM
Advanced Information Preliminar y Datasheet
OV9620 Color CMOS SXGA (1.3 MPixel) CAMERACHIPTM OV9121 B&W CMOS SXGA (1.3 MPixel) CAMERACHIPTM Applications
· · · · · · Digital still cameras PC camera/dual mode Video conference applications Machine vision Security cameras Biometrics
The OV9620 (color) and OV9121 (black and white) are high-performance 1.3 mega-pixel CAMERACHIPSTM for digital still image and video camera products. Both devices incorporate a 1280 x 1024 (SXGA) image array and an on-chip 10-bit A/D converter capable of operating at up to 15 frames per second (fps) with full resolution. Proprietary sensor technology utilizes advanced algorithms to cancel Fixed Pattern Noise (FPN), eliminate smearing, and drastically reduce blooming. The control registers allow for flexible control of timing, polarity, and CameraChip operation, which, in turn, allows the engineer a great deal of freedom in product design.
Key Specifications
SXGA VGA Power Supply Power Active Requirements Standby Output Formats (10-bit) Lens Size Max. Image SXGA Transfer Rate VGA Sensitivity S/N Ratio Dynamic Range Scan Mode Gamma Correction SXGA Electronics Exposure VGA Pixel Size Dark Current Fixed Pattern Noise Image Area Package Dimensions Array Size 1280 x 1024 640 x 480 3.3 VDC and 2.5VDC (+5%) < 50 mA < 10 µA Raw RGB Data 1/2" 15 fps 30 fps 1.0 V/Lux-sec 54 dB 60 dB (due to ADC limitations) Progressive N/A Up to 1050:1 Up to 500:1 5.2 µm x 5.2 µm 28 mV/s < 0.03% of VPEAK-TO-PEAK 6.66 mm x 5.32 mm .560 in. x .560 in.
Features
· · · · · · · · · · · Optical Black Level Calibration (BLC) Video or snapshot operations Programmable/Auto Exposure and Gain Control Programmable/Auto White Balance Control Horizontal and vertical sub-sampling (4:2 and 4:2) Programmable image windowing Variable frame rate control On-chip R/G/B channel and luminance average counter Internal/External frame synchronization SCCB slave interface Power-on reset and power-down mode
Figure 1 OV9620/OV9121 Pin Diagram
AD G N D AD VD D 20 XC L K2 XC L K1 Vr AD 2 19 18 ASUB 17 AGND 16 AVDD 15 VcCHG 14 FSIN 13 VGA 12 EXPSTB 11 SCCB_E 10 RESET 9 8 7 43 NC 44 NC 45 S IO _D 46 SIO _ C 47 V c CH G 48 S G ND 1 S VD D 2 V rH IGH 3 N BIT 4 DE VD D 5 DE G ND 6 V rL O W SRAMT FREX PWDN DG ND 23 DV DD 22 D4 D3 D2 D1 25 D0 24
Ordering Information
PCLK 31 32 33 34 35 36 37 38 39 40 41 42
30
29
28
27
26
21
Product OV9620 (Color, SXGA, VGA) OV9121 (B&W, SXGA, VGA)
Package CLCC-48 CLCC-48
D5 D6 D7 D8 D9 DOVDD DOGND HREF CHSYNC VSYNC NC
OV9620/OV9121
Version 2.3, April 11, 2003
Proprietary to OmniVision Technologies
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OV9620/OV9121
CMOS SXGA (1.3 MPixel) CAMERACHIPTM
Omni
ision
Functional Description
Figure 2 shows the functional block diagram of the OV9620/OV9121 image sensor. The OV9620/OV9121 includes: · Image Sensor Array (1280 x 1024 resolution) · Gain Control · Channel Balance · 10-Bit Analog-to-Digital Converter · Black Level Compensation · SCCB Interface · Digital Video Port · Timing Generator
Figure 2 Functional Block Diagram
D[9:0] Channel Balance 10-Bit A/D Black Level Compensation Digital Video Port PCLK HREF HSYNC VSYNC Image Array (1312 x 1036) Gain Control Balance Control Control Register Bank
Column Sense Amps R o w Select
AMP
PLL
Timing Generator and Control Logic
SCCB Slave Interface
XCLK
RESET
PWDN
FSI
VGA
FREX
EXPSTB
SIO_C
SIO_D SCCB_E
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Proprietary to OmniVision Technologies
Version 2.3, April 11, 2003
Omni
ision
Functional Description
Image Sensor Array
The OV9620/OV9121 sensor is a 1/2-inch format CMOS imaging device. The sensor contains 1,359,232 pixels. Figure 3 shows the active regions of sensor array.
10-Bit Analog-to-Digital Converter
The balanced signal then will be digitized by the on-chip 10-bit ADC. It can operate at up to 12 MHz, and is fully synchronous to the pixel clock. The actual conversion rate is determined by the frame rate.
Figure 3 Sensor Array Region
Column R o0BG w1G R
0 2 3 4 5 6 8 B B G R G R G R B G B G B G G R G R G R B G B G B G G R G R G R B G B G B G G R G R G R B G B G B G G R G R G R B G B G B G G R G R G R 1024 Active Lines 1032 1033 1034 1035 B G B G G R G R B G B G G R G R B G B G G R G R B G B G G R G R B G B G G R G R B G B G G R G R Dummy Dummy B G G R 1306 1307 1308 1309 1310 1311
Black Level Compensation
Dummy Dummy Dummy Dummy Optical Black Dummy Dummy Dummy Dummy
1
2
3
4 B G B G
B G B G
G R G R
5 G R G R
B G B G
G R G R
B G B G
G R G R
B G B G
G R G R
7G 9G 10 11 B G
After the pixel data has been digitized, black level calibration can be performed before the data is output. The black level calibration block subtracts the average signal level of optical black pixels to compensate for the dark current in the pixel output. Black level calibration can be disabled by the user.
Windowing
OV9620/OV9121 allows the user to define window size or region of interest (ROI), as required by the application. Window size setting (in pixels) ranges from 2 x 4 to 1280 x 1024 (SXGA) or 2 x 2 to 640 x 480 (VGA), and can be anywhere inside the 1312 x 1036 boundary. Note that modifying window size or window position does not alter the frame or pixel rate. The windowing control merely alters the assertion of the HREF signal to be consistent with the programmed horizontal and vertical ROI. The default window size is 1280 x 1024. See Figure 4 and registers HREFST, HREFEND, VSTRT, VEND, and COMM for details.
The color filters are Bayer pattern. The primary color BG/GR array is arranged in line-alternating fashion. Of the 1,359,232 pixels, 1,310,720 are active. The other pixels are used for black level calibration and interpolation. The sensor array design is based on a field integration read-out system with line-by-line transfer and an electronic shutter with a synchronous pixel read-out scheme.
Figure 4 Windowing
Column Start HREF
R Column o w
Gain Control
When the column sample/hold circuit has sampled one row of pixels, the pixel data will shift out one-by-one into an analog amplifier. The amplifier gain can either be programmed by the user or controlled by the internal automatic gain control circuit (AGC). The gain adjustment range is 0-24 dB.
Column End
Row Start HRE F Display Window
Channel Balance
Row End
The amplified signals are then balanced with a channel balance block. In this block, Red/Blue channel gain is increased or decreased to match Green channel luminance level and gamma correction is performed. The adjustment range is 54 dB. This function can be done manually by the user or with the internal automatic white balance controller (AWB).
Sensor Array Boundary
Version 2.3, April 11, 2003
Proprietary to OmniVision Technologies
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