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Part: 74ALVC16244DT

Category:
 Logic
   -> Buffers/Drivers
             -> Buffers

Description: Low-voltage 1.8/2.5/3.3V 16 Bit Buffer With 3.6 V-tolerant Inputs And Outputs , Package: Tssop, Pins=48

Company: ON Semiconductor

Datasheet: Download 74ALVC16244DT datasheet     File size : 67 kB

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Datasheet text preview:
74ALVC16244 Low-Voltage 1.8/2.5/3.3 V 16-Bit Buffer
With 3.6 V­Tolerant Inputs and Outputs (3­State, Non­Inverting)
The 74ALVC16244 is an advanced performance, non­inverting 16­bit buffer. It is designed for very high­speed, very low­power operation in 1.8 V, 2.5 V or 3.3 V systems. T h e 74ALVC16244 is nibble controlled with each nibble functioning identically, but independently. The control pins may be tied together to obtain full 16­bit operation. The 3­state outputs are controlled by an Output Enable (OEn) input for each nibble. When OEn is LOW, the outputs are on. When OEn is HIGH, the outputs are in the high impedance state.
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48

48 1

74ALVC16244DT AWLYYWW

· Designed for Low Voltage Operation: VCC = 1.65­3.6 V · 3.6 V Tolerant Inputs and Outputs · High Speed Operation: 3.0 ns max for 3.0 to 3.6 V · · · · · · ·
3.7 ns max for 2.3 to 2.7 V 6.0 ns max for 1.65 to 1.95 V Static Drive: ±24 mA Drive at 3.0 V ±12 mA Drive at 2.3 V ±4 mA Drive at 1.65 V Supports Live Insertion and Withdrawal IOFF Specification Guarantees High Impedance When VCC = 0 V Near Zero Static Supply Current in All Three Logic States (40 mA) Substantially Reduces System Power Requirements Latchup Performance Exceeds ±250 mA @ 125°C ESD Performance: Human Body Model >2000 V; Machine Model >200 V Second Source to Industry Standard 74ALVC16244

TSSOP­48 DT SUFFIX CASE 1201 A WL YY WW

1

= Assembly Location = Wafer Lot = Year = Work Week

ORDERING INFORMATION
Device 74ALVC16244DTR Package TSSOP Shipping 2500/Tape & Reel

To ensure the outputs activate in the 3­state condition, the output enable pins should be connected to VCC through a pull­up resistor. The value of the resistor is determined by the current sinking capability of the output connected to the OE pin.

© Semiconductor Components Industries, LLC, 2002

1

July, 2002 ­ Rev. 0

Publication Order Number: 74ALVC16244/D

74ALVC16244
OE1 1 O0 2 O1 3 GND 4 O2 5 O3 6 VCC 7 O4 8 O5 9 GND 10 O6 11 O7 12 O8 13 O9 14 GND 15 O10 16 O11 17 VCC 18 O12 19 O13 20 GND 21 O14 22 O15 23 OE4 24 48 OE2 47 D0 46 D1 45 GND 44 D2 43 D3 42 VCC 41 D4 40 D5 39 GND 38 D6 37 D7 36 D8 35 D9 34 GND 33 D10 32 D11 31 VCC 30 D12 29 D13 28 GND 27 D14 26 D15 25 OE3 OE1 48 OE2 25 OE3 24 OE4 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 1 1 1 1

OE1 OE2

1 48

OE3 OE4

25 24

D0:3

O0:3

D8:11

O8:11

D4:7

O4:7

D12:15

O12:15 One of Four

Figure 2. Logic Diagram

EN1 EN2 EN3 EN4
1

1

2 3 5 6 8 9 11

2

3

12 13 14 16

Figure 1. 48­Lead Pinout (Top View) PIN NAMES
Pins OEn D0­D15 O0­O15 Function Output Enable Inputs Inputs Outputs

4

17 19 20 22 23

O0 O1 O2 O3 O4 O5 O6 O7 O8 O9 O10 O11 O12 O13 O14 O15

Figure 3. IEC Logic Diagram

OE1 L L H

D0:3 L H X

O0:3 L H Z

OE2 L L H

D4:7 L H X

O4:7 L H Z

OE3 L L H

D8:11 L H X

O8:11 L H Z

OE4 L L H

D12:15 L H X

O12:15 L H Z

H = High Voltage Level; L = Low Voltage Level; Z = High Impedance State; X = High or Low Voltage Level and Transitions Are Acceptable, for ICC reasons, DO NOT FLOAT Inputs

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74ALVC16244
MAXIMUM RATINGS (Note 1)
Symbol VCC VI VO IIK IOK IO ICC IGND TSTG TL TJ qJ A MSL FR VESD DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Sink/Source Current DC Supply Current per Supply Pin DC Ground Current per Ground Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature Under Bias Thermal Resistance (Note 2) Moisture Sensitivity Flammability Rating ESD Withstand Voltage Oxygen Index: 30% ­ 35% Human Body Model (Note 3) Machine Model (Note 4) Charged Device Model (Note 5) Above VCC and Below GND at 125°C (Note 6) VI < GND VO < GND Parameter Value *0.5 to )4.6 *0.5 to )4.6 *0.5 to )4.6 *50 *50 $50 $100 $100 *65 to )150 260 )150 90 Level 1 UL­94­VO (0.125 in) u2000 u200 N/A $250 V Unit V V V mA mA mA mA mA °C °C °C °C/W

ILATCH­UP

Latch­Up Performance

mA

Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum­rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions. 1. IO absolute maximum rating must be observed. 2. Measured with minimum pad spacing on an FR4 board, using 10 mm­by­1 inch, 2­ounce copper trace with no air flow. 3. Tested to EIA/JESD22­A114­A. 4. Tested to EIA/JESD22­A115­A. 5. Tested to JESD22­C101­A. 6. Tested to EIA/JESD78.

RECOMMENDED OPERATING CONDITIONS
Symbol VCC VI VO TA Dt/DV Supply Voltage Input Voltage Output Voltage Operating Free­Air Temperature Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 2.5 V ±0.2 V VCC = 3.0 V ±0.3 V Parameter Operating Data Retention Only (Note 7) (Active State) (3­State) Min 1.65 1.2 ­0.5 0 0 ­40 0 0 Typ 3.3 3.3 Max 3.6 3.6 3.6 VCC 3.6 +85 20 10 Unit V V V °C ns/V

7. Unused inputs may not be left open. All inputs must be tied to a high­logic voltage level or a low­logic input voltage level.

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74ALVC16244
DC ELECTRICAL CHARACTERISTICS
TA = ­40°C to +85°C Symbol VIH Characteristic HIGH Level Input Voltage (Note 8) Condition 1.65 V VCC < 2.3 V 2.3 V VCC 2.7 V 2.7 V < VCC 3.6 V VIL LOW Level Input Voltage (Note 8) 1.65 V VCC < 2.3 V 2.3 V VCC 2.7 V 2.7 V < VCC 3.6 V VOH HIGH Level Output Voltage 1.65 V VCC 3.6 V; IOH = ­100 mA VCC = 1.65 V; IOH = ­4 mA VCC = 2.3 V; IOH = ­6 mA VCC = 2.3 V; IOH = ­12 mA VCC = 2.7 V; IOH = ­12 mA VCC = 3.0 V; IOH = ­12 mA VCC = 3.0 V; IOH = ­24 mA VOL LOW Level Output Voltage 1.65 V VCC 3.6 V; IOL = 100 mA VCC = 1.65 V; IOL = 4 mA VCC = 2.3 V; IOL = 6 mA VCC = 2.3 V; IOL = 12 mA VCC = 2.7 V; IOL = 12 mA VCC = 3.0 V; IOL = 24 mA II IOZ IOFF ICC DICC Input Leakage Current 3­State Output Current Power­Off Leakage Current Quiescent Supply Current (Note 9) 1.65 V VCC 3.6 V; 0 V VI 3.6 V 1.65 V VCC 3.6 V; 0 V VO 3.6 V; VI = VIH or VIL VCC = 0 V; VI or VO = 3.6 V 1.65 V VCC 3.6 V; VI = GND or VCC 1.65 V VCC 3.6 V; 3.6 V VI, VO 3.6 V Increase in ICC per Input 2.7 V < VCC 3.6 V; VIH = VCC ­ 0.6 V 8. These values of VI are used to test DC electrical characteristics only. 9. Outputs disabled or 3­state only. VCC ­ 0.2 1.2 2.0 1.7 2.2 2.4 2.0 0.2 0.45 0.4 0.7 0.4 0.55 ±5.0 ±10 10 40 ±40 750 mA mA mA mA mA mA V Min 0.65 x VCC 1.7 2.0 0.35 x VCC 0.7 0.8 V V Max Unit V

AC CHARACTERISTICS (Note 10; tR = tF = 2.0 ns; CL = 30 pF; RL = 500 W)
Limits TA = ­40°C to +85°C VCC = 3.0 V to 3.6 V Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tOSHL tOSLH Parameter Propagation Delay Input to Output Output Enable Time to High and Low Level Output Disable Time From High and Low Level Output­to­Output Skew (Note 11) Waveform 1 2 2 Min 1.0 1.0 1.0 1.0 1.0 1.0 Max 3.0 3.0 4.4 4.4 4.1 4.1 0.5 0.5 VCC = 2.3 V to 2.7 V Min 1.0 1.0 1.0 1.0 1.0 1.0 Max 3.7 3.7 5.7 5.7 5.2 5.2 0.5 0.5 VCC = 1.65 to 1.95 V Min 1.0 1.0 1.0 1.0 1.0 1.0 Max 6.0 6.0 8.2 8.2 6.8 6.8 0.75 0.75 Unit ns ns ns ns

10. For CL = 50 pF, add approximately 300 ps to the AC maximum specification. 11. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH­to­LOW (tOSHL) or LOW­to­HIGH (tOSLH); parameter guaranteed by design.

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74ALVC16244
CAPACITIVE CHARACTERISTICS
Symbol CIN COUT CP D Parameter Input Capacitance Output Capacitance Power Dissipation Capacitance Condition Note 12 Note 12 Note 12, 10 MHz Typical 6 7 20 Unit pF pF pF

12. VCC = 1.8, 2.5 or 3.3 V; VI = 0 V or VCC.

VIH Dn Vm tPLH On Vm WAVEFORM 1 - PROPAGATION DELAYS tR = tF = 2.0ns, 10% to 90%; f = 1MHz; tW = 500ns VIH OEn tPZH On tPZL On Vm Vm tPLZ tPHZ Vm 0V VOH Vy 0V VCC Vx VOL Vm tPHL Vm VOL 0V VOH

WAVEFORM 2 - OUTPUT ENABLE AND DISABLE TIMES tR = tF = 2.0ns, 10% to 90%; f = 1MHz; tW = 500ns

Figure 4. AC Waveforms
VCC Symbol VIH Vm Vx Vy 3.3 V ±0.3 V 2.7 V 1.5 V VOL + 0.3 V VOH ­ 0.3 V 2.5 V ±0.2 V VCC VCC/2 VOL + 0.15 V VOH ­ 0.15 V 1.8 V ±0.15 V VCC VCC/2 VOL + 0.15 V VOH ­ 0.15 V

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