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Details, datasheet, quote on part number:74FST3125D
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Datasheet text preview:
74FST3125 4-Bit Bus Switch
The ON Semiconductor 74FST3125 is a quad, high performance switch. The device is CMOS TTL compatible when operating between 4 and 5.5 Volts. The device exhibits extremely low RON and adds nearly zero propagation delay. The device adds no noise or ground bounce to the system. The device consists of four independent 1bit switches with separate Output/Enable (OE) pins. Port A is connected to Port B when OE is low. If OE is high, the switch is high Z.
http://onsemi.com MARKING DIAGRAMS
14 1 SO14 D SUFFIX CASE 751A 14 FST3125 AWLYWW 1 14 14 1 FST 3125 ALYW
· · · · · · ·
RON t 4 W Typical Less Than 0.25 nsMax Delay Through Switch Nearly Zero Standby Current No Circuit Bounce Control Inputs are TTL/CMOS Compatible PinForPin Compatible With QS3125, FST3125, CBT3125 All Popular Packages: QSOP16, TSSOP14, SOIC14
OE1 1A 1B OE2 2A 2B GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VCC OE4 4A 4B OE3 3A 3B
TSSOP14 DT SUFFIX CASE 948G 1 16 1 16
Figure 1. Pin Assignment for SOIC and TSSOP
S3125 ALYW
QSOP16 QS SUFFIX CASE 492 A L, WL Y W, WW = = = =
1 Assembly Location Wafer Lot Year Work Week
NC OE1 1A 1B OE2 2A 2B GND
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
VCC OE4 4A 4B OE3 3A 3B NC
PIN NAMES
Pin OE1, OE2, OE3, OE4 1A, 2A, 3A, 4A 1B, 2B, 3B, 4B Description Bus Switch Enables Bus A Bus B Not Connected
Figure 2. Pin Assignment for QSOP
NC
ORDERING INFORMATION
Device 74FST3125D 74FST3125DR2 74FST3125DT 74FST3125DTR2 74FST3125QS 74FST3125QSR
İ Semiconductor Components Industries, LLC, 2001
Package SO14 SO14 TSSOP14 TSSOP14 QSOP16 QSOP16
Shipping 55 Units/Rail 2500 Units/Reel 96 Units/Rail 2500 Units/Reel 98 Units/Rail 2500 Units/Reel
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August, 2001 Rev. 1
Publication Order Number: 74FST3125/D
74FST3125
OE1
1
1A OE2
2 4
3
1B
2A OE3
5 10
6
2B
3A OE4
9 13
8
3B
4A
12
11
4B
Figure 3. Logic Diagram
TRUTH TABLE
Inputs OE L H Outputs A, B A=B Z
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74FST3125
MAXIMUM RATINGS
Symbol VCC VI VO IIK IOK IO ICC IGND TSTG TL TJ qJ A DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Sink Current DC Supply Current per Supply Pin DC Ground Current per Ground Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature Under Bias Thermal Resistance (Note 1) SOIC TSSOP QSOP VI t GND VO t GND Parameter Value *0.5 to )7.0 *0.5 to )7.0 *0.5 to )7.0 *50 *50 128 $100 $100 *65 to )150 260 )150 125 170 200 Level 1 Oxygen Index: 28 to 34 Human Body Model (Note 2) Machine Model (Note 3) Above VCC and Below GND at 85_C (Note 4) UL 94 V0 @ 0.125 in u2000 u200 $500 V mA Unit V V V mA mA mA mA mA _C _C _C _C/W
MSL FR VESD ILATCHUP
Moisture Sensitivity Flammability Rating ESD Withstand Voltage LatchUp Performance
Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximumrated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions. 1. Measured with minimum pad spacing on an FR4 board, using 10 mmby1 inch, 2ounce copper trace with no air flow. 2. Tested to EIA/JESD22A114A. 3. Tested to EIA/JESD22A115A. 4. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VI VO TA Dt/DV Supply Voltage Input Voltage Output Voltage Operating FreeAir Temperature Input Transition Rise or Fall Rate Switch Control Input Switch I/O Parameter Operating, Data Retention Only (Note ) (HIGH or LOW State) Min 4.0 0 0 *40 0 0 Max 5.5 5.5 VCC )85 5 DC Unit V V V _C ns/V
5. Unused control inputs may not be left open. All control inputs must be tied to a high or lowlogic input voltage level.
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74FST3125
DC ELECTRICAL CHARACTERISTICS
VCC Symbol VIK VIH VIL II IOZ RON Parameter Clamp Diode Resistance HighLevel Input Voltage LowLevel Input Voltage Input Leakage Current OFFSTATE Leakage Current Switch On Resistance (Note 6) 0 v VIN v 5.5 V 0 v A, B v VCC VIN = 0 V, IIN = 64 mA VIN = 0 V, IIN = 30 mA VIN = 2.4 V, IIN = 15 mA VIN = 2.4 V, IIN = 15 mA ICC DICC Quiescent Supply Current Increase In ICC per Input VIN = VCC or GND, IOUT = 0 One input at 3.4 V, Other inputs at VCC or GND IIN = *18mA Conditions (V) 4.5 4.0 to 5.5 4.0 to 5.5 5.5 5.5 4.5 4.5 4.5 4.0 5.5 5.5 4 4 8 11 2.0 0.8 $1.0 $1.0 7 7 15 20 3 2.5 mA mA TA = *40_C to )85_C Min Typ* Max *1.2 Unit V V V mA mA W
*Typical values are at VCC = 5.0 V and TA = 25_C. 6. Measured by the voltage drop between A and B pins at the indicated current through the switch.
AC ELECTRICAL CHARACTERISTICS
Limits TA = *40_C to )85_C VCC = 4.5 to 5.5 V Symbol tPHL, tPLH tPZH, tPZL tPHZ, tPLZ Parameter Prop Delay Bus to Bus (Note 7) Output Enable Time Output Disable Time Conditions VI = OPEN VI = 7 V for tPZL VI = OPEN for tPZH VI = 7 V for tPLZ VI = OPEN for tPHZ Figures 4 and 5 4 and 5 4 and 5 1.0 1.5 Min Max 0.25 5.0 5.3 VCC = 4.0 V Min Max 0.25 5.5 5.6 Unit ns ns ns
7. This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance).
CAPACITANCE (Note 8)
Symbol CIN CI/O Parameter Control Pin Input Capacitance Input/Output Capacitance VCC = 5.0 V VCC, OE = 5.0 V Conditions Typ 3 5 Max Unit pF pF
8. TA = )25_C, f = 1 MHz, Capacitance is characterized but not tested.
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74FST3125
AC Loading and Waveforms
VI FROM OUTPUT UNDER TEST CL * 500 W
500 W
NOTES: 1. Input driven by 50 W source terminated in 50 W. 2. CL includes load and stray capacitance. *CL = 50 pF
Figure 4. AC Test Circuit
tf = 2.5 nS 90 % SWITCH INPUT 1.5 V 10 % tPLH 90 % 1.5 V
tf = 2.5 nS 3.0 V Vmi 10 % tPLH VOH GND
1.5 V OUTPUT
1.5 V VOL
Figure 5. Propagation Delays
tf = 2.5 nS tf = 2.5 nS ENABLE INPUT 90 % 1.5 V 10 % tPZL OUTPUT 10 % 90 % 1.5 V GND tPZL 3.0 V
1.5 V
VOL + 0.3 V VOL tPHZL VOH
tPZH
1.5 V OUTPUT
VOH 0.3 V
Figure 6. Enable/Disable Delays http://onsemi.com
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