Digchip : Database on electronics components
 
Member, Distributor  
Log In
Email:
Password:


Part: DTC114TE

Category:
 Discrete
   -> Transistors
     -> Bipolar
       -> General Purpose
         -> NPN
             -> SOT/Surface Mount

Description: Bias Resistor Transistor NPN

Company: ON Semiconductor

Datasheet: Download DTC114TE datasheet     File size : 104 kB

Request For quote: Find where to buy DTC114TE



Datasheet text preview:
ON Semiconductort

Product Preview Bias Resistor Transistor
NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network
The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base­emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. The DTC114YE is housed in the SOT­416/SC­90 package which is ideal for low power surface mount applications where board space is at a premium.

DTC114YE
3 2 1

CASE 463­01, STYLE 1 SOT­416/SC­90

· · · ·

Simplifies Circuit Design Reduces Board Space Reduces Component Count Available in 8 mm, 7 inch/3000 Unit Tape and Reel.

IN (1)

R1 R2

OUT (3)

R1 = 10 k R2 = 47 k

GND (2)

MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating Output Voltage Input Voltage Output Current Symbol VO VI IO Value 50 40 100 Unit Vdc Vdc mAdc

DEVICE MARKING
DTC114YE = 69

THERMAL CHARACTERISTICS
Power Dissipation @ TA = 25°C(1) Operating and Storage Temperature Range Junction Temperature PD TJ, Tstg TJ *125 ­55 to +150 150 mW °C °C

ELECTRICAL CHARACTERISTICS (TA = 25°C)
Characteristic Input Off Voltage (VO = 5.0 Vdc, IO = 100 µAdc) Input On Voltage (VO = 0.3 Vdc, IO = 1.0 mAdc) Output On Voltage (IO = 5.0 mAdc, II = 0.25 mAdc) Input Current (VI = 5.0 Vdc) Output Cutoff Current (VO = 50 Vdc) DC Current Gain (VO = 5.0 Vdc, IO = 5.0 mAdc) Input Resistance Resistance Ratio Symbol VI(off) VI(on) VO(on) II IO(off) GI R1 R1/R2 Min -- 1.4 -- -- -- 68 7.0 0.17 Typ -- -- -- -- -- -- 10 0.21 Max 0.3 -- 0.3 0.88 500 -- 13 0.25 Unit Vdc Vdc Vdc mAdc nAdc -- kOhms

1. Device mounted on a FR­4 glass epoxy printed circuit board using the minimum recommended footprint.
This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2001

1

March, 2001 ­ Rev. 2

Publication Order Number: DTC114YE/D

DTC114YE
TYPICAL ELECTRICAL CHARACTERISTICS
1 TA = -25°C 25°C 75°C G I , DC CURRENT GAIN (NORMALIZED) VO(on), OUTPUT VOLTAGE (V) IO/II = 10 300 250 200 150 100 50 0 1 2 4 6 8 10 15 20 40 50 60 70 80 IO, OUTPUT CURRENT (mA) 90 100 VO(on) = 10 TA = 75°C 25°C -25°C

0.1

0.01

0.001

0

20

40 60 IO, OUTPUT CURRENT (mA)

80

Figure 1. VO(on) versus IO

Figure 2. GI, DC Current Gain

100 TA = 75°C IO, OUTPUT CURRENT (mA) 25°C V I , INPUT VOLTAGE (VOLTS)

10 VO = 0.2 V TA = -25°C 25°C 75°C

-25°C 10

1

VO = 5 V 1 0 2 4 6 VI, INPUT VOLTAGE (V) 8 10

0.1

0

10

20 30 IO, OUTPUT CURRENT (mA)

40

50

Figure 3. Output Current versus Input Voltage

Figure 4. Input Voltage versus Output Current

4 3.5 Cob , CAPACITANCE (pF) 3 2.5 2 1.5 1 0.5 0 0 2 4 6 8 10 15 20 25 30 35 VR, REVERSE BIAS VOLTAGE (VOLTS) 40 45 50 f = 1 MHz lE = 0 V TA = 25°C

Figure 5. Output Capacitance

http://onsemi.com
2

DTC114YE
TYPICAL APPLICATIONS FOR NPN BRTs
+12 V

ISOLATED LOAD

FROM µP OR OTHER LOGIC

Figure 6. Level Shifter: Connects 12 or 24 Volt Circuits to Logic

+12 V

VCC

OUT IN LOAD

Figure 7. Open Collector Inverter: Inverts the Input Signal

Figure 8. Inexpensive, Unregulated Current Source

http://onsemi.com
3

DTC114YE
MINIMUM RECOMMENDED FOOTPRINTS FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.

0.5 min. (3x)

Unit: mm

0.5 min. (3x)

1.4

SOT­416/SC­90 POWER DISSIPATION The power dissipation of the SOT­416/SC­90 is a function of the pad size. This can vary from the minimum pad size for soldering to the pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RJA, the thermal resistance from the device junction to ambient; and the operating temperature, TA. Using the values provided on the data sheet, PD can be calculated as follows:
PD = TJ(max) ­ TA RJA

the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 125 milliwatts.
PD = 150°C ­ 25°C = 125 milliwatts 1000°C/W

The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into

The 1000°C/W assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 125 milliwatts. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal CladTM. Using a board material such as Thermal Clad, a higher power dissipation can be achieved using the same footprint.

SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. · Always preheat the device. · The delta temperature between the preheat and soldering should be 100°C or less.* · When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference should be a maximum of 10°C.

· The soldering temperature and time should not exceed

260°C for more than 10 seconds. · When shifting from preheating to soldering, the maximum temperature gradient should be 5°C or less. · After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. · Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.

SOLDER STENCIL GUIDELINES Prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. A solder stencil is required to screen the optimum amount of solder paste onto the footprint. The stencil is made of brass or stainless steel with a typical thickness of 0.008 inches. The stencil opening size for the surface mounted package should be the same as the pad size on the printed circuit board, i.e., a 1:1 registration.

http://onsemi.com
4

1

TYPICAL SOLDERING PATTERN

ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ

0.5

ÉÉÉ ÉÉÉ ÉÉÉ

DTC114YE
TYPICAL SOLDER HEATING PROFILE For any given circuit board, there will be a group of control settings that will give the desired heat pattern. The operator must set temperatures for several heating zones, and a figure for belt speed. Taken together, these control settings make up a heating "profile" for that particular circuit board. On machines controlled by a computer, the computer remembers these profiles from one operating session to the next. Figure 9 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. This profile will vary among soldering systems but it is a good starting point. Factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. This profile shows temperature versus time. The line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. The two profiles are based on a high density and a low density board. The Vitronics SMD310 convection/infrared reflow soldering system was used to generate this profile. The type of solder used was 62/36/2 Tin Lead Silver with a melting point between 177­189°C. When this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. The components on the board are then heated by conduction. The circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. Because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints.

STEP 1 PREHEAT ZONE 1 RAMP" 200°C

STEP 2 STEP 3 VENT HEATING SOAK" ZONES 2 & 5 RAMP"

STEP 5 STEP 4 HEATING HEATING ZONES 3 & 6 ZONES 4 & 7 SPIKE" SOAK" 170°C 160°C

STEP 6 STEP 7 VENT COOLING 205° TO 219°C PEAK AT SOLDER JOINT

DESIRED CURVE FOR HIGH MASS ASSEMBLIES 150°C

150°C

100°C 100°C

140°C

SOLDER IS LIQUID FOR 40 TO 80 SECONDS (DEPENDING ON MASS OF ASSEMBLY)

50°C

DESIRED CURVE FOR LOW MASS ASSEMBLIES

TIME (3 TO 7 MINUTES TOTAL)

TM A X

Figure 9. Typical Solder Heating Profile

http://onsemi.com
5




Others parts begin by dt