Details, datasheet, quote on part number: MC74HC126AFR2
PartMC74HC126AFR2
CategoryLogic => Buffers/Drivers => Buffers
TitleBuffers
DescriptionBuffer, Non-inverting 3-State , Package: Soic, Pins=14
CompanyON Semiconductor
DatasheetDownload MC74HC126AFR2 datasheet
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Features, Applications

The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125A and HC126A noninverting buffers are designed to be used with 3­state memory address drivers, clock drivers, and other bus­oriented systems. The devices have four separate output enables that are active­low (HC125A) or active­high (HC126A).

PDIP­14 N SUFFIX CASE 646 MC74HC12xAN AWLYYWW SOIC­14 D SUFFIX CASE TSSOP­14 DT SUFFIX CASE HC 12xA ALYW HC12xA AWLYWW

Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 6.0 V Low Input Current: 1.0 µA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 72 FETs or 18 Equivalent Gates

LOGIC DIAGRAM HC125A HC126A Active­Low Output Enables Active­High Output Enables
A = Assembly Location L = Wafer Lot Y = Year W = Work Week

Device MC74HC12xADT MC74HC12xADTR2 Output Package SOIC­14 TSSOP­14 Shipping 2000 / Box 55 / Rail 2500 / Reel 96 / Rail 2500 / Reel HC126A

Symbol VCC Vin Iin Vout Iout PD Parameter Value Unit V DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) 0.5 to VCC to VCC DC Output Voltage (Referenced to GND) DC Input Current, per Pin mA DC Output Current, per Pin ICC DC Supply Current, VCC and GND Pins Power Dissipation in Still Air Plastic DIP SOIC Package TSSOP Package mW Tstg TL Storage Temperature 150 260

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high­impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND (Vin or Vout) VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP, SOIC or TSSOP Package)

Symbol Parameter VCC Vin, Vout TA tr, tf Min 2.0 0 Max 6.0 Unit V DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) VCC Operating Temperature, All Package Types Input Rise and Fall Time (Figure

*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. Derating Plastic DIP: ­ 10 mW/_C from to 125_C SOIC Package: ­ 7 mW/_C from to 125_C TSSOP Package: ­ 6.1 mW/_C from to 125_C For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High­Speed CMOS Data Book (DL129/D).


Guaranteed Limit 85_C Symbol Iin Parameter Test Conditions VCC 25_C 125_C Unit µA Maximum Input Leakage Current Maximum Three­State Leakage Current Vin = VCC or GND IOZ Output in High­Impedance State Vin = VIL or VIH Vout = VCC or GND Vin = VCC or GND Iout 0 µA ICC Maximum Quiescent Supply Current (per Package) µA NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High­Speed CMOS Data Book (DL129/D).

Maximum Propagation Delay, Input A to Output Y (Figures 1 and 3)
Maximum Propagation Delay, Output Enable to Y (Figures 2 and 4)
Maximum Output Transition Time, Any Output (Figures 1 and 3)
Maximum Three­State Output Capacitance (Output in High­Impedance State)

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON Semiconductor High­Speed CMOS Data Book (DL129/D). Typical @ 25°C, VCC 5.0 V CPD Power Dissipation Capacitance (Per Buffer)* 30 pF

* Used to determine the no­load dynamic power consumption: CC V CC. For load considerations, see Chapter 2 of the ON Semiconductor High­Speed CMOS Data Book (DL129/D).


 

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