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Details, datasheet, quote on part number:NB100ELT23LD
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Datasheet text preview:
NB100ELT23L 3.3V Dual Differential LVPECL to LVTTL Translator
The NB100ELT23L is a dual differential LVPECL to LVTTL translator. Because LVPECL (Positive ECL) levels are used, only +3.3 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23L makes it ideal for applications which require the translation of a clock and a data signal. The ELT23L is available in only the ECL 100K standard. Since there are no LVPECL outputs or an external VBB reference, the ELT23L does not require both ECL standard versions. The LVPECL inputs are differential. Therefore, the NB100ELT23L can accept any standard differential LVPECL input referenced from a VCC of +3.3 V.
http://onsemi.com MARKING DIAGRAMS*
8 SO8 D SUFFIX CASE 751 1 8 8 1 TSSOP8 DT SUFFIX CASE 948R 1 K23L ALYW KT23L ALYW
8 1
· · · · · ·
2.1 ns Typical Propagation Delay Maximum Operating Frequency > 275 MHz 24 mA LVTTL Outputs Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V Open Input Default State Q Output Will Default LOW with Inputs Open or at GND
A L Y W
= Assembly Location = Wafer Lot = Year = Work Week
*For additional information, see Application Note AND8002/D
ORDERING INFORMATION
Device NB100ELT23LD NB100ELT23LDR2 NB100ELT23LDT Package SO8 SO8 TSSOP8 Shipping 98 Units/Rail 2500 Tape & Reel 100 Units/Rail
NB100ELT23LDTR2 TSSOP8 2500 Tape & Reel
© Semiconductor Components Industries, LLC, 2002
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September, 2002 Rev. 1
Publication Order Number: NB100ELT23L/D
NB100ELT23L
D0
1
8
VCC
PIN DESCRIPTION
D0 2 LVPECL D1 3 LVTTL 6 Q1 VCC GND D1 4 5 GND Positive Supply Ground 7 Q0 PIN Q0, Q1 D0**, D1** D0**, D1** FUNCTION LVTTL Outputs Differential LVPECL Inputs
** Pins will default to VCC/2 when left open.
Figure 1. 8Lead Pinout (Top View) and Logic Diagram
ATTRIBUTES
Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model Value 75 kW 37.5 kW > 1.2 kV > 150 V > 2 kV Level 1 UL 94 V0 @ 1.25 in 91 Devices
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Oxygen Index: 28 to 34
MAXIMUM RATINGS (Note 2)
Symbol VCC VI Iout TA Tstg qJ A qJ C qJ A qJ C Tsol Power Supply Input Voltage Voltage Output Current Operating Temperature Range Storage Temperature Range Thermal Resistance (JunctiontoAmbient) Thermal Resistance (JunctiontoCase) Thermal Resistance (JunctiontoAmbient) Thermal Resistance (JunctiontoCase) Wave Solder 0 LFPM 500 LFPM std bd 0 LFPM 500 LFPM std bd <2 to 3 sec @ 248°C 8 SOIC 8 SOIC 8 SOIC 8 TSSOP 8 TSSOP 8 TSSOP Parameter Condition 1 GND = 0 V GND = 0 V Continuous Surge VI VCC Condition 2 Rating 3.8 3.8 50 100 40 to +85 65 to +150 190 130 41 to 44 185 140 41 to 44 265 Units V V mA mA °C °C °C/W °C/W °C/W °C/W °C/W °C/W °C
2. Maximum Ratings are those values beyond which device damage may occur.
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NB100ELT23L
PECL DC CHARACTERISTICS VCC = 3.3 V, GND = 0 V (Note 3)
40°C Symbol ICCH ICCL VIH VIL VIHCMR IIH IIL Characteristic Power Supply Current (Outputs set to HIGH) Power Supply Current (Outputs set to LOW) Input HIGH Voltage Input LOW Voltage Input HIGH Voltage Common Mode Range (Note 4) Input HIGH Current Input LOW Current Min 10 15 2075 1355 2.0 Typ 14 19 Max 20 25 2420 1675 3.3 150 0.5 Min 10 15 2075 1355 2.0 25°C Typ 15 19 Max 20 25 2420 1675 3.3 150 0.5 Min 10 15 2075 1355 2.0 85°C Typ 15 20 Max 20 25 2420 1675 3.3 150 0.5 Unit mA mA mV mV V mA mA
NOTE: Circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 3. All values vary 1:1 with VCC. 4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
TTL DC CHARACTERISTICS VCC = 3.3 V, GND = 0.0 V, TA = 40°C to 85°C
Symbol VOH VOL IOS Characteristic Output HIGH Voltage (Note 5) Output LOW Voltage (Note 5) Output Short Circuit Current Condition IOH = 3.0 mA IOL = 24 mA 180 Min 2.4 0.5 50 Typ Max Unit V V mA
NOTE: Circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 5. All loading with 500 W to GND.
AC CHARACTERISTICS VCC = 3.3 V $ 5%, GND = 0.0 V (Note 6)
40°C Symbol fmax tPLH, tPHL tSK+ + tSK tSKPP tJITTER VPP tr tf Characteristic Maximum Frequency Propagation Delay to CL = 20 pF Output Differential (Note 7) OutputtoOutput Skew++ OutputtoOutput Skew ParttoPart Skew (Note 8) CycletoCycle Jitter Input Voltage Swing (Differential) Output Rise/Fall Times (1.0 V 2.0 V) CL = 20 pF Q 150 500 300 0.2 800 Min 160 1.5 2.1 2.75 60 25 500 <1 1200 1300 1000 150 500 300 0.2 800 Typ Max Min 160 1.5 2.1 2.75 60 25 500 <1 1200 1300 1000 150 500 300 0.2 800 25°C Typ Max Min 160 1.5 2.1 2.75 60 25 500 <1 1200 1300 1000 ps 85°C Typ Max Unit MHz ns
ps mV ps
6. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 500 W to GND, CL = 20 pF. 7. Reference (VCC = 3.3 V ± 5%; GND = 0 V) 8. Skews are measured between outputs under identical conditions.
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