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Details, datasheet, quote on part number:NCP1010ST100T3
 
 
Part:NCP1010ST100T3
Description:Self-supplied Monolithic Switcher For Low Standby-power Offline SMPS
Company:ON Semiconductor
Datasheet:Download NCP1010ST100T3 datasheet   File size : 58 kB
Request For quote:  Find where to buy NCP1010ST100T3
 



Datasheet text preview:
AND8125/D Evaluating the Power Capability of NCP101X Members
Prepared by: Christophe Basso ON Semiconductor http://onsemi.com
APPLICATION NOTE ท Maximum Peak Current: In the NCP101X series, the
peak current is internally fixed. This parameter plays an obvious role in the maximum transmitted power since it obeys the DCM Flyback formula, Pout = 0.5 x h x Lp x Ip2 x Fsw. One input of our process selection will thus be the reference peak current, 100 mA, 250 mA, 350 mA or 450 mA. Once the theoretical power capability has been evaluated, it will finally be necessary to check the power dissipation of the switcher itself (given conduction losses, switching losses, etc.) and see what remains available for a reliable operation.
Operating in DCM
The NCP101X series is available in various combinations of peak current and switching frequencies. To help the designer quickly picking up the right part, it is important to present guidelines aimed to simplify the selection process. This application note details how to evaluate the power handled by each device and offers an overview of each part capability. Each reference is affected by a key parameter that needs to be accounted for at the very beginning like the switching frequency, the maximum peak current and the Rds(ON). Among these parameters, we also find another set of constraints but linked to the adopted topology, i.e. current mode in our case: ท DCM Operation: As the device operates in current-mode, it is mandatory to keep operating in discontinuous mode with a duty-cycle bounded below 50% to avoid sub - harmonic oscillations when accidentally entering Continuous Conduction Mode (CCM). We will use 0.45 as the maximum value in our examples. ท Nonnegative Reflection: The built-in lateral MOSFET does not accept to see its body diode forward biased by an excessive Flyback voltage greater than the bulk voltage during the OFF time. Hence, for universal mains operation, the turn ratio Ns:Np will be selected to keep Vreflect = (Ns/Np) x (Vout + Vf) below the very minimum operating DC input voltage of your converter (including the input 120/100 Hz ripple in offline applications). For instance, if we have a 100 VAC input, it becomes 141 V once rectified minus the selected ripple. If choose a "20% ripple, then the very minimum DC voltage is 141ญ20% = 112 V. We can select a 100 V maximum reflection voltage (noted Vr) for a safe operation on wide mains, whereas this number will grow-up above 200 V for European mains operation (230 VAC "15%).
When the switch closes, Vin is applied across the primary inductance Lp until the current reaches the level imposed by the feedback loop. The duration of this event is called the ON time and can be defined by:
Ton + Lp ท Ip Vin
(eq. 1)
Lp, primary inductance, Vin the input voltage, Ip the operating peak current.
At the switch opening, the primary energy is transferred to the secondary and the flyback voltage appears across Lp, resetting the transformer core with a slope of
N ท (Vout ) Vf) . Toff, the OFF time is thus: Lp Toff + Lp ท Ip N ท (Vout ) Vf)
(eq. 2)
Lp, primary inductance, Vout the output voltage, Ip the operating peak current, Vf the secondary rectifier voltage drop, N the transformer turn ratio, Ns:Np.
ฉ Semiconductor Components Industries, LLC, 2003
1
July, 2003 - Rev. 0
Publication Order Number: AND8125/D
AND8125/D
If one wants to keep DCM only, but still need to pass the maximum power, we will not allow a dead-time after the core is reset, but rather immediately restart (fixed frequency boundary mode operation). The switching period can be expressed by:
Tsw + Toff ) Ton + Lp ท Ip ท
Extracting Lp from equation 5 gives:
Lpcritical + (Vin ท Vr)2 ท h 2 ท Fsw ท [Pout ท (Vr2 ) 2 ท Vr ท Vin ) Vin2)]
Vin
1 ) N ท (Vo1t ) (Vf) u
eq. 3)
(eq. 6) , with Vr = N. (Vout + Vf) our reflected voltage... Selecting a primary inductance value lower than the one given by equation 6 ensures discontinuous operation at the lowest line for a given reflected voltage.
Nonnegative Reflection
with Vin the input voltage
The Flyback transfer formula dictates that:
Pout + 1 ท Lp ท Ip2 ท Fsw (eq. 4) which, by extracting Ip h 2
(with h the converter efficiency)
and plugging into equation 3, leads to:
Tsw + Lp 2 ท Pout h ท Fsw ท Lp
ท V1in ) N ท (Vo1t ) Vf) (eq. u
5)
If we operate on universal mains from 100 VAC to 250 VAC, then the maximum reflected voltage is: VinAC x 1.414 ญ ripple = 112 V with a selected "20% ripple (eq. 7) . We can take 100 V to include a safety margin. Running the part from a single Europeans mains offers greater flexibility. The voltage is 230 VAC "15%, which leads to a minimum AC operating voltage of: 230-15% = 195 VAC. The maximum reflected voltage is thus: VinAC x 1.414 ญ ripple = 220 V with a selected "10% ripple (eq. 8) . We can take 210 V to include a safety margin.
Maximum Peak Current
The maximum peak current is given by the particular part reference. If we follow the data sheet, these values are:
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NCP1010 NCP1011 NCP1012 NCP1013 NCP1014 Rdson (W) 23 11 Ipeak (mA) Freq (kHz) 100 250 250 350 450 65 100 130 65 100 130 65 100 130 65 100 130 65 100
Combining all these parameters together, we can finally calculate what theoretical maximum power we can pass satisfying the three bullets expressed at the beginning of this document. From the maximum peak current, duty-cycle constraint and minimum input voltage (universal or narrow mains), we deduce the maximum inductor Lpmax we can use:
Lpmax +
DC max ท Vinput min ท Tsw (eq. 9) . If we Ip max
apply the following parameters (45% max DC, 120 VDC minimum voltage, 65 kHz switching frequency and 100 mA peak current), it gives an upper inductance boundary of: 0.45 x 120 x 15.4 m/0.1 = 8.3 mH.
If we now equate equation 9 with equation 6, we can obtain the maximum power constrained by a 45% duty-cycle, a maximum peak current and a given minimum input voltage:
Pmax : + Tsw2 ท Vinmin2 ท Vr2 ท h ท Fsw (2 ท Lpmax ท Vr2 ) 4 ท Lpmax ท Vr ท Vinmin ) 2 ท Lpmax ท Vinmin2)
(eq. 10)
Keep the same parameters as above, we obtain, Pmax = 2.2 W. Please note that increasing the switching frequency will not expand the power capability of the given converter but will reduce the inductance and allow a smaller magnetic element (the L x I2 goes down). Running the same chart with all the listed references, gives the first following correspondence between a given peak current and a theoretical maximum power obtained from a converter operated at high line and low line:
Table 1. Theoretical Transmitted Power Depending on Peak Current Only
Peak Current 450 mA 350 mA 250 mA 100 mA Wide Mains Operation 8.9 W 6.9 W 5.0 W 2.0 W 230 " 15% Operation 18.6 W 14.5 W 10.3 W 4.1 W
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AND8125/D
Accounting for the Part Parameters Power Dissipation of the PDIP7 Package
We now need to refine these calculations knowing our thermal constraints and internal power dissipation (conduction and switching losses, Dynamic Self-Supply, etc.) in order to offer a final selection table. The following chart will be used to assess all possible power combinations given the NCP101X family:
Select frequency Fsw
Capacitive losses P1 = Fsw x Coss
The power dissipated by the PDIP7 package is dependent upon its internal consumption and the total thermal resistance junction-to-ambient RqJA. If we start from a 70ฐC ambient temperature and a RqJA of 75ฐC/W (which was measured on the demoboard with 35 m added copper ญ please see data sheet for suggested layout), then the maximum dissipation from the PDIP7 is: (Max TjญTa)/ RqJA = (125ญ70)/75 = 730 mW which grows up to 1.0 W for a lower maximum ambient temperature of Ta = 50ฐC. Calculating the total power consumption of a monolithic circuit implies splitting the budget with the various contributors: 1. Dynamic Self Supply (DSS): The average current flowing through the DSS is directly the current needed by the chip to operate (neglecting the switching losses on the DSS itself. Therefore, PDSS = ICC1 x VHV. Therefore, if we in average, the parts exhibit an average ICC1 consumption of 1.0 mA, then the maximum DSS dissipated power is: 1.0 m x 370 V = 0.37 W. (This number drops to 0 W with an auxiliary winding and thus offers better margin for the MOSFET.) 2. Switching Losses: Theoretically, the turn-on losses are null since we turn on the MOSFET at zero current (DCM). However, there still is a parasitic capacitance on the MOSFET (Coss and Crss) which play a role in the power dissipation budget. To assess the value of this capacitor, we can measure the time taken by the current to come back to zero:
DSS is used?
P2 = 0
P2 = Vbulk max x ICC1 Package and PCB dependency Conduction losses
Pdmax = (Tj - Ta)/RqJA Dissipation room for MOSFET Pcond = Pdmax - (P1 + P2)
IdRMS = ฃ (Pcond, Rdson) Compute Ip available since DCM
Ip available u NCP101Xmin
Ip final = Ip available
Ip final = NCP101Xmin
Compute Pmax using equations 9 & 10
Figure 1. Power Flowchart - Used methodology for assessing the maximum power capability from a particular part number.
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