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Part: NCP1561
Category: Power Management -> PWM Controllers -> Others
Description:
Company: ON Semiconductor
Datasheet: Download NCP1561 datasheet File size : 161 kB
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Datasheet text preview:
NCP1561 Product Preview Dual Output PWM Controller
The NCP1561 Dual Output PWM Controller contains all of the features and flexibility needed to implement voltagemode or currentmode control for modern high performance power converters. This device cost effectively reduces system part count with the inclusion of a highvoltage startup regulator that operates over a wide input range of 33 V to 150 V. The NCP1561 provides two control outputs, OUT1 and OUT2, which switch at half the oscillator frequency and are limited to less than 50% duty cycle. Other distinctive features include: two mode overcurrent protection, line under/overvoltage lockout, fast line feedforward, softstart and a maximum duty cycle clamp.
Features http://onsemi.com MARKING DIAGRAM
16 SO16 D SUFFIX CASE 751B 1 1 A WL Y WW = Assembly Location = Wafer Lot = Year = Work Week NCP1561DR2 AWLYWW
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Internal High Voltage Startup Regulator Dual Control Outputs Voltage Mode or Current Mode Capability Single Resistor Oscillator Frequency Setting Fast Line FeedForward Line Under/Overvoltage Lockout Dual Mode OverCurrent Protection Programmable Maximum Duty Cycle Control Maximum Duty Cycle Proportional to Line Voltage Programmable SoftStart Precision Reference Telecommunication Power Converters Industrial Power Converters High Voltage Power Modules +42 V Automotive Systems
ORDERING INFORMATION
Device NCP1561DR2 Package SO16 Shipping 2500 Units/Reel
Typical Applications
This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2001
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December, 2001 Rev. 0
Publication Order Number NCP1561/D
NCP1561
Vin Vaux GND Startup Regulator Thermal Shutdown
REF
5 V REF
UV_OV Protection CS C_SKIP_SET RT OSC FF_SET Ramp_OUT
Ramp_IN Modulator Vea Max Duty Set
STEERING LOGIC
OUT1 OUT2 SS
Figure 1. Simplified Block Diagram
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NCP1561
1 Vin 12 mA AUX 16 CA U X 11 V/7 V 14 GND Thermal Shutdown Vin 1.49 V UV_OV 2 + + Level Shift C_Skip_Set 6 CS K I P Clock 5 CS 1.2 V + Cycle Skip Timer Disable_Vref Disable_ss 15 STOP 3.60 V Q TF/F Q 13 OUT2 OUT1 + Disable
Vout 7 11 Vaux
Disable_Vref OUT
DIS
Voltage Reference
11 5 V_Ref
S Dominant Reset Q Latch R
1.0 V
+
SS CS S
9
6 µA
Disable_ss
Soft Start +
STOP Vin RFF FF_Set RT RT TP_Ramp 4 7 3 Buffer Oscillator Clock OSC_Ramp FF_Ramp OUT1 OUT2
2V VREF RM D P + 8 RP 0 Open Open RM D P Open Open 100 K Max Duty % 30 40 X50 PWM Max Duty 60 80% 12 + 10 20 k RAMP_IN VEA
Max_Duty_Set RP
Figure 2. NCP1561 Block Diagram
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