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Details, datasheet, quote on part number:NCP5351D
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| Part: | NCP5351D |
| Category: | Power Management => Power Distribution/Switches => MOSFET Drivers => MOSFET/IGBT Drivers |
| Description: | Ana 4A Buck Driver, Package: Soic, Pins=8 |
| Company: | ON Semiconductor |
| Datasheet: | Download NCP5351D datasheet File size : 726 kB |
| Request For quote: | Find where to buy NCP5351D
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Datasheet text preview:
NCP5351 4 A Synchronous Buck Power MOSFET Driver
The NCP5351 is a dual MOSFET gate driver optimized to drive the gates of both high and lowside Power MOSFETs in a Synchronous Buck converter. The NCP5351 is an excellent companion to multiphase controllers that do not have integrated gate drivers, such as ON Semiconductor's CS5323, CS5305 or CS5307. This architecture provides a power supply designer the flexibility to locate the gate drivers close to the MOSFETs. 4 Amp drive capability makes the NCP5351 ideal for minimizing switching losses in MOSFETs with large input capacitance. Optimized internal, adaptive nonoverlap circuitry further reduces switching losses by preventing simultaneous conduction of both MOSFETs. The floating top driver design can accommodate MOSFET drain voltages as high as 25 V. Both gate outputs can be driven low, and supply current reduced to less than 25 µA, by applying a low logic level to the Enable (EN) pin. An Undervoltage Lockout function ensures that both driver outputs are low when the supply voltage is low, and a Thermal Shutdown function provides the IC with overtemperature protection. The NCP5351 is pintopin compatible with the SC1205 and is available in a standard SO8 package. Features · 4 A Peak Drive Current · Rise and Fall Times < 15 ns Typical into 6000 pF · Propagation Delay from Inputs to Outputs < 20 ns · Adaptive Nonoverlap Time Optimized for Large Power MOSFETs · Floating Top Driver Accommodates Applications Up to 25 V · Undervoltage Lockout to Prevent Switching when the Input Voltage is Low · Thermal Shutdown Protection Against Overtemperature · < 1 mA Quiescent Current Enabled · 25 µA Quiescent Current Disabled · Internal TG to DRN Pulldown Resistor Prevents HV SupplyInduced Turn On of HighSide MOSFET
http://onsemi.com MARKING DIAGRAM
1 SO8 D SUFFIX CASE 751 1 A WL, L YY, Y WW, W = Assembly Location = Wafer Lot = Year = Work Week 8 5351 ALYW
8
PIN CONNECTIONS
DRN TG BST CO 1 8 PGND BG VS EN
ORDERING INFORMATION
Device NCP5351D NCP5351DR2 Package SO8 SO8 Shipping 98 Units/Rail 2500 Tape & Reel
Semiconductor Components Industries, LLC, 2002
1
December, 2002 Rev. 7
Publication Order Number: NCP5351/D
NCP5351
BST VS + + 4.25 V Delay Nonoverlap Control Level Shifter TG
DRN
EN
Delay Thermal Shutdown VS
CO PGND
Figure 1. Block Diagram
Table 1. InputOutput Truth Table
EN L H H H H CO X L H L H DRN X 5.0 V > 5.0 V TG L L H L H BG L H L L L
VCO tpdlBG tpdlTG tfTG
VTGVDRN trTG tpdhTG (Nonoverlap) VBG tfBG trBG tpdhBG (Nonoverlap) VDRN 4.0 V
Figure 2. Timing Diagram
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2
+
4.0 V
BG
NCP5351
MAXIMUM RATINGS*
Rating Operating Junction Temperature, TJ Package Thermal Resistance: Junction to Case, RJC Junction to Ambient, RJA Storage Temperature Range, TS Lead Temperature Soldering: MSL Rating *The maximum package power dissipation must be observed. 1. 60 seconds maximum above 183°C. NOTE: This device is ESD sensitive. Use standard ESD precautions when handling. Reflow: (SMD styles only) (Note 1) Value Internally Limited 45 165 65 to 150 230 peak 1 Unit °C °C/W °C/W °C °C
MAXIMUM RATINGS
Pin Symbol VS BST DRN Pin Name Main Supply Voltage Input Bootstrap Supply Voltage Input Switching Node (Bootstrap Supply Return) HighSide Driver Output (Top Gate) LowSide Driver Output (Bottom Gate) TG & BG Control Input Enable Input Ground VMAX 6.3 V 25 V wrt/PGND 6.3 V wrt/DRN 25 V VMIN 0.3 V 0.3 V wrt/DRN 1.0 V DC 5.0 V for 100 ns 6.0 V for 20 ns 0.3 V wrt/DRN 0.3 V 0.3 V 0.3 V 0V ISOURCE NA NA 4.0 A Peak (< 100 µs) 250 mA DC 4.0 A Peak (< 100 µs) 250 mA DC 4.0 A Peak (< 100 µs) 250 mA DC 1.0 mA 1.0 mA 4.0 A Peak (< 100 µs) 250 mA DC ISINK 4.0 A Peak (< 100 µs) 250 mA DC 4.0 A Peak (< 100 µs) 250 mA DC NA
TG BG CO EN PGND NOTE:
25 V wrt/PGND 6.3 V wrt/DRN 6.3 V 6.3 V 6.3 V 0V
4.0 A Peak (< 100 µs) 250 mA DC 4.0 A Peak (< 100 µs) 250 mA DC 1.0 mA 1.0 mA NA
All voltages are with respect to PGND except where noted.
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