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Part: PZTA92T1
Category:
Discrete
-> Transistors
-> Bipolar
-> General Purpose
Description: High Voltage Transistor , Package: SOT-223 (TO-261), Pins=4
Company: ON Semiconductor
Datasheet: Download PZTA92T1 datasheet File size : 40 kB
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Datasheet text preview:
ON Semiconductort
High Voltage Transistor
PNP Silicon
COLLECTOR 2,4 BASE 1 EMITTER 3 Symbol VCEO VCBO VEBO IC PD Tstg TJ Value 300 300 5.0 500 1.5 65 to +150 150 Unit Vdc Vdc Vdc mAdc Watts °C °C
PZTA92T1
ON Semiconductor Preferred Device
MAXIMUM RATINGS
Rating CollectorEmitter Voltage CollectorBase Voltage EmitterBase Voltage Collector Current Total Power Dissipation up to TA = 25°C(1) Storage Temperature Range Junction Temperature
SOT223 PACKAGE PNP SILICON HIGH VOLTAGE TRANSISTOR SURFACE MOUNT
4
1
2 3
CASE 318E04, STYLE 1 TO261AA
DEVICE MARKING
P2D
THERMAL CHARACTERISTICS
Characteristic Thermal Resistance from Junction to Ambient(1) Symbol R J A Max 83.3 Unit °C/W
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Max Unit
OFF CHARACTERISTICS
CollectorEmitter Breakdown Voltage (IC = 1.0 mAdc, IB = 0) CollectorBase Breakdown Voltage (IC = 100 µAdc, IE = 0) EmitterBase Breakdown Voltage (IE = 100 µAdc, IC = 0) CollectorBase Cutoff Current (VCB = 200 Vdc, IE = 0) EmitterBase Cutoff Current (VBE = 3.0 Vdc, IC = 0) V(BR)CEO V(BR)CBO V(BR)EBO ICBO IEBO 300 300 5.0 -- -- -- -- -- 0.25 0.1 Vdc Vdc Vdc µAdc µAdc
ON CHARACTERISTICS
DC Current Gain(2) (IC = 1.0 mAdc, VCE = 10 Vdc) (IC = 10 mAdc, VCE = 10 Vdc) (IC = 30 mAdc, VCE = 10 Vdc) Saturation Voltages (IC = 20 mAdc, IB = 2.0 mAdc) (IC = 20 mAdc, IB = 2.0 mAdc) hFE 25 40 25 VCE(sat) VBE(sat) -- -- -- -- -- Vdc 0.5 0.9 --
DYNAMIC CHARACTERISTICS
CollectorBase Capacitance @ f = 1.0 MHz (VCB = 20 Vdc, IE = 0) CurrentGain -- Bandwidth Product (IC = 10 mAdc, VCE = 20 Vdc, f = 100 MHz) Cc b fT -- 50 6.0 -- pF MHz
1. Device mounted on a glass epoxy printed circuit board 1.575 in. x 1.575 in. x 0.059 in.; mounting pad for the collector lead min. 0.93 in2. 2. Pulse Test: Pulse Width 300 µs; Duty Cycle = 2.0%.
Preferred devices are ON Semiconductor recommended choices for future use and best overall value.
© Semiconductor Components Industries, LLC, 2001
1
March, 2001 Rev. 4
Publication Order Number: PZTA92T1/D
PZTA92T1
300 250 hFE , DC CURRENT GAIN 200 150 100 50 0 -55°C TJ = +125°C VCE = 10 Vdc
25°C
0.1
1.0 IC, COLLECTOR CURRENT (mA)
10
100
Figure 1. DC Current Gain
Cib @ 1MHz
BANDWIDTH (MHz) f T, CURRENT-GAIN
100
150 130 110 90 70 50 30 10 1 3 5 11 13 15 7 9 IC, COLLECTOR CURRENT (mA) TJ = 25°C VCE = 20 Vdc F = 20 MHz 17 19 21
C, CAPACITANCE (pF)
10 Ccb @ 1MHz
1.0
0.1 0.1
1.0 10 100 VR, REVERSE VOLTAGE (VOLTS)
1000
Figure 2. Capacitance
1.4 1.2 V, VOLTAGE (VOLTS) 1.0 0.8 0.6 0.4 0.2 0.0 0.1 1.0 10 IC, COLLECTOR CURRENT (mA) 100
Figure 3. CurrentGain -- Bandwidth
VCE(sat) @ 25°C, IC/IB = 10 VCE(sat) @ 125°C, IC/IB = 10 VCE(sat) @ -55°C, IC/IB = 10 VBE(sat) @ 25°C, IC/IB = 10 VBE(sat) @ 125°C, IC/IB = 10 VBE(sat) @ -55°C, IC/IB = 10 VBE(on) @ 25°C, VCE = 10 V VBE(on) @ 125°C, VCE = 10 V VBE(on) @ -55°C, VCE = 10 V
Figure 4. "ON" Voltages
http://onsemi.com
2
PZTA92T1 INFORMATION FOR USING THE SOT-223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection
0.15 3.8 0.079 2.0
interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.
0.091 2.3 0.079 2.0 0.059 1.5 0.059 1.5
0.091 2.3
0.248 6.3
0.059 1.5
inches mm
SOT-223
SOT-223 POWER DISSIPATION The power dissipation of the SOT-223 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet for the SOT-223 package, PD can be calculated as follows:
PD = TJ(max) TA RJA
Although the power dissipation can almost be doubled with this method, area is taken up on the printed circuit board which can defeat the purpose of using surface mount technology. A graph of RJA versus collector pad area is shown in Figure 5.
160 R JA , Thermal Resistance, Junction to Ambient ( C/W) Board Material = 0.0625 G 10/FR 4, 2 oz Copper 0.8 Watts TA = 25°C
140
° 120 1.25 Watts* 1.5 Watts
The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 1.5 watts.
PD = 150°C 25°C = 1.5 watts 83.3°C/W
100 *Mounted on the DPAK footprint 0.2 0.4 0.6 A, Area (square inches) 0.8 1.0
80 0.0
The 83.3°C/W for the SOT-223 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 1.5 watts. There are other alternatives to achieving higher power dissipation from the SOT-223 package. One is to increase the area of the collector pad. By increasing the area of the collector pad, the power dissipation can be increased.
Figure 5. Thermal Resistance versus Collector Pad Area for the SOT-223 Package (Typical)
Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal CladTM. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint.
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3
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