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Details, datasheet, quote on part number:TL072CD
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| Part: | TL072CD |
| Category: | Analog & Mixed-Signal Processing => Amplifiers => Operational Amplifiers => General Purpose => Dual |
| Description: | Low Noise, JFET Input Operational Amplifier |
| Company: | ON Semiconductor |
| Datasheet: | Download TL072CD datasheet File size : 152 kB |
| Request For quote: | Find where to buy TL072CD
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Datasheet text preview:
ON Semiconductort
Low Noise, JFET Input Operational Amplifiers
These low noise JFET input operational amplifiers combine two stateoftheart analog technologies on a single monolithic integrated circuit. Each internally compensated operational amplifier has well matched high voltage JFET input device for low input offset voltage. The BIFET technology provides wide bandwidths and fast slew rates with low input bias currents, input offset currents, and supply currents. Moreover, the devices exhibit low noise and low harmonic distortion, making them ideal for use in high fidelity audio amplifier applications. These devices are available in single, dual and quad operational amplifiers which are pincompatible with the industry standard MC1741, MC1458, and the MC3403/LM324 bipolar products.
TL071C,AC TL072C,AC TL074C,AC
LOW NOISE, JFET INPUT OPERATIONAL AMPLIFIERS
SEMICONDUCTOR TECHNICAL DATA
8 8 1 1
· · · · · · ·
Low Input Noise Voltage: 18 nV/ Hz Typ Low Harmonic Distortion: 0.01% Typ Low Input Bias and Offset Currents High Input Impedance: 1012 Typ High Slew Rate: 13 V/µs Typ Wide Gain Bandwidth: 4.0 MHz Typ Low Supply Current: 1.4 mA per Amp
P SUFFIX PLASTIC PACKAGE CASE 626
D SUFFIX PLASTIC PACKAGE CASE 751 (SO8)
PIN CONNECTIONS
Offset Null 1 Inv + Input 2 Noninvt Input 3 VEE 4 + 8 NC 7 VCC 6 Output 5 Offset Null
TL071 (Top View) Output A 1 Inputs A 2 3
+ +
8
VCC
VEE 4
7 Output B 6 Inputs B 5
TL072 (Top View)
14 1
N SUFFIX PLASTIC PACKAGE CASE 646 (TL074 Only)
PIN CONNECTIONS
Output 1 1 Inputs 1 2 3 5 6
+
14 Output 4 13 12 10 9 1 4
+
Inputs 4
ORDERING INFORMATION
Op Amp Function Single Device TL071CD TL071ACP TL072CD Dual Quad TL072ACP TL074CN, ACN Operating Temperature Range TA = 0° to +70°C 0° to +70°C TA = 0° to +70°C 0° to +70°C TA = 0° to +70°C Package SO8 Plastic DIP SO8 Plastic DIP Plastic DIP
VCC 4 Inputs 2
+
11 VEE 2 3
+
Inputs 3
Output 2 7 TL074 (Top View)
8 Output 3
© Semiconductor Components Industries, LLC, 2002
1
March, 2002 Rev. 2
Publication Order Number: TL071C/D
TL071C,AC TL072C,AC TL074C,AC
MAXIMUM RATINGS
Rating Supply Voltage Differential Input Voltage Input Voltage Range (Note 1) Output Short Circuit Duration (Note 2) Power Dissipation Plastic Package (N, P) Derate above TA = 47°C Operating Ambient Temperature Range Storage Temperature Range Symbol VCC VEE VID VIDR tSC PD 1.0/JA TA Tstg Value 18 18 ±30 ±15 Continuous 680 10 0 to +70 65 to +150 mW mW/°C °C °C Unit V V V
NOTES: 1. The magnitude of the input voltage must not exceed the magnitude of the supply voltage or 15 V, whichever is less. 2. The output may be shorted to ground or either supply. Temperature and/or supply voltages must be limited to ensure that power dissipation ratings are not exceeded. 3. ESD data available upon request.
ELECTRICAL CHARACTERISTICS (VCC = 15 V, VEE = 15 V, TA = Thigh to Tlow [Note 1])
Characteristics Input Offset Voltage (RS 10 k, VCM = 0) TL071C, TL072C TL074C TL07_AC Input Offset Current (VCM = 0) (Note 2) TL07_C TL07_AC Input Bias Current (VCM = 0) (Note 2) TL07_C TL07_AC LargeSignal Voltage Gain (VO = ±10 V, RL 2.0 k) TL07_C TL07_AC Output Voltage Swing (PeaktoPeak) (RL 10 k) (RL 2.0 k) Symbol VIO IIO IIB AVOL 15 25 VO 24 20 V 7.0 7.0 V/mV 2.0 2.0 nA 13 13 7.5 nA Min Typ Max Unit mV
NOTES: 1. Tlow = 0°C for TL071C,AC Thigh = 70°C for TL071C,AC 0°C for TL072C,AC Thigh = 70°C for TL072C,AC 0°C for TL074C,AC Thigh = 70°C for TL074C,AC 2. Input Bias currents of JFET input op amps approximately double for every 10°C rise in junction temperature as shown in Figure 3. To maintain junction temperature as close to ambient temperature as possible, pulse techniques must be used during testing.
Figure 1. Unity Gain Voltage Follower
Figure 2. Inverting Gain of 10 Amplifier
10 k 1.0 k
Vin + RL = 2.0 k
VO
Vin
+ RL
VO
CL = 100 pF
CL = 100 pF
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TL071C,AC TL072C,AC TL074C,AC
ELECTRICAL CHARACTERISTICS (VCC = 15 V, VEE = 15 V, TA = 25°C, unless otherwise noted.)
Characteristics Input Offset Voltage (RS 10 k, VCM = 0) TL071C, TL072C TL074C TL07_AC Average Temperature Coefficient of Input Offset Voltage RS = 50 , TA = Tlow to Thigh (Note 1) Input Offset Current (VCM = 0) (Note 2) TL07_C TL07_AC Input Bias Current (VCM = 0) (Note 2) TL07_C TL07_AC Input Resistance Common Mode Input Voltage Range TL07_C TL07_AC LargeSignal Voltage Gain (VO = ±10 V, RL 2.0 k) TL07_C TL07_AC Output Voltage Swing (PeaktoPeak) (RL = 10 k) Common Mode Rejection Ratio (RS 10 k) TL07_C TL07_AC Supply Voltage Rejection Ratio (RS 10 k) TL07_C TL07_AC Supply Current (Each Amplifier) Unity Gain Bandwidth Slew Rate (See Figure 1) Vin = 10 V, RL = 2.0 k, CL = 100 pF Rise Time (See Figure 1) Overshoot (Vin = 20 mV, RL = 2.0 k, CL = 100 pF) Equivalent Input Noise Voltage RS = 100 , f = 1000 Hz Equivalent Input Noise Current RS = 100 , f = 1000 Hz Total Harmonic Distortion VO (RMS) = 10 V, RS 1.0 k, RL 2.0 k, f = 1000 Hz Channel Separation AV = 100 Symbol VIO VIO/T IIO IIB ri VICR ±10 ±11 25 50 VO CMRR 70 80 PSRR 70 80 ID BW SR tr OS en in THD CS 100 100 1.4 4.0 13 0.1 10 18 0.01 0.01 120 2.5 mA MHz v/µs µs % nV/ Hz pA/ Hz % dB 100 100 dB 24 30 30 1012 15, 12 15, 12 150 150 28 200 200 V/mV V dB V 5.0 5.0 50 50 pA 3.0 3.0 3.0 10 10 10 6.0 µV/°C pA Min Typ Max Unit mV
AVOL
NOTES: 1. Tlow = 0°C for TL071C,AC Thigh = 70°C for TL071C,AC 0°C for TL072C,AC Thigh = 70°C for TL072C,AC 0°C for TL074C,AC Thigh = 70°C for TL074C,AC 2. Input Bias currents of JFET input op amps approximately double for every 10°C rise in junction temperature as shown in Figure 3. To maintain junction temperature as close to ambient temperature as possible, pulse techniques must be used during testing.
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