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Details, datasheet, quote on part number:OXFW911
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Datasheet text preview:
IEEE1394 to ATA/ATAPI Native Bridge
FEATURES
· · · · · · · · · · S400 (50 Mbytes/s) compliant 1394-1995 Link and Transaction layers Compatible with 1394-1995 and 1394A Phys. Microsoft Win98-Second Edition, Win2000 and Apple MacOS generic driver support SBP-2 Target Revision 4 compliant interface Fully ATA-5 compliant (see T13-1321D) Support for UDMA5 (ATA100) Sustained data transfer of 35 MB/s Supports PIO modes 0 to 4, DMA modes 0 to 2 and Ultra DMA modes 0 to 5 ORB co-processor to accelerate translation of ORBs to ATAPI commands Supports ORB chaining for increased performance · · · · · · · · ·
OXFW911
Data Sheet
High performance ATA command translation in firmware using Reduced Block Command (RBC) set Integrated 32-bit RISC processor (ARM7TDMI) with on-chip scratch RAM Optional External Serial ROM interface for configuration data, user serial number, etc. Integrated 512kb Flash memory Blank Flash memory programming feature via 1394 bus Firmware and Flash Programming Utilities supplied by Oxford Semiconductor 3.3 Volts operation Low Power CMOS Ultra-thin 128-TQFP package (14 x 14 x 1 mm)
DESCRIPTION
The OXFW911 is a high-performance 1394 to ATA/ATAPI (IDE) native bridge with an integrated target Serial Bus Protocol (SBP-2 ) controller. By supporting the SBP-2 protocol, the device can use generic SBP-2 drivers available in the Microsoft Windows 98SE, Microsoft Windows 2000, Microsoft Millennium and Apple MacOS (8.4 to 9.04) operating systems. MacOS support also includes booting from Firewire disk. The device is ideally suited for smart-cable or tailgate interface applications for removable-media drives, compact flash card readers, CD-ROM, CD-R, CD-RW, DVD-ROM, DVD-RAM and hard disk drives, allowing IDE drives to be connected to a 1394 serial bus in a plug-and-play fashion. Both ATA and ATAPI devices are supported using the same firmware. This highly integrated device offers a two-chip solution to native bridge applications using an external 1394 PHY. The device is compatible with both 1394-1995 and 1394A PHYs. The LINK controller complies with 1394-1995 and 1394A specifications. The 1394 transaction layer and SBP-2 protocol is implemented using a combination of the ARM7TDMI (low-power 32-bit RISC processor), an ORB (Operational Request Block) hardware co-processor and a high performance buffer manager. The buffer manager has a RAM bandwidth of 800Mbps. It provides storage for 1394 and ATA/ATAPI packets, Oxford Semiconductor Ltd. 25 Milton Park, Abingdon, Oxon, OX14 4SH, UK Tel: +44 (0)1235 824900 Fax: +44(0)1235 821141 automatically storing them and passing them to the appropriate destinations, without any intervention from the processor. It also provides storage and manages the sequencing of ORB fetching to reduce latency and improve data throughput. The configuration data including the IEEE OUI (Organisational Unique Identifier) and device serial number is stored in the Flash ROM which may be uploaded from the 1394 bus, even when blank. The device also facilitates firmware uploads from the 1394 bus. The ORB co-processor translates ORBs as defined in the SBP-2 protocol into ATA/ATAPI commands, and automatically stores error/status messages at an address specified by the host. Concurrent operation of the ATA/ATAPI and 1394 interfaces are facilitated using the high throughput buffer manager where LINK, ATAPI manager and ARM7TDMI can perform interleaved accesses to the on-chip RAM buffer. The high performance processor ensures that no significant latency is incurred. The ATA command translation is performed in firmware to meet RBC (Reduced Block Commands) standard, T10-1228D. The ATA/ATAPI Manager supports PIO modes 0 to 4, DMA modes 0 to 2 and Ultra DMA mode 0 to 5 and provides the interface to the IDE bus. It is compliant with T13-1321D, ATA-5 specification, as well as support for ATA100.
© Oxford Semiconductor 2001 OXFW911 Data Sheet Revision 1.1 Mar 2001 Part No. OXFW911-TQ-A
OXFORD SEMICONDUCTOR LTD.
OXFW911
CONTENTS
FEATURES .......1 DESCRIPTION ..1 CONTENTS.......2 1 2 3 4 5 6
6.1 6.2 6.3 5.1
BLOCK DIAGRAM .....3 PIN INFORMATION ............4 PIN DESCRIPTIONS ...........5 OPERATING CONDITIONS ..........7 DC ELECTRICAL CHARACTERISTICS .......7
I/O BUFFERS ...... 7 IDE INTERFACE .......... 8 1394 LINK-PHY INTERFACE ............ 11 EXTERNAL PROCESSOR INTERFACE.......... 13
AC ELECTRICAL CHARACTERISTICS .......8
7 8 9
TIMING WAVEFORMS......14 PACKAGE INFORMATION ........ 29 ORDERING INFORMATION ............. 29
NOTES ........... 31 CONTACT DETAILS.......32 DISCLAIMER .. 32
Data Sheet Rev 1.1
Page 2
OXFORD SEMICONDUCTOR LTD.
OXFW911
1
BLOCK DIAGRAM
Buffer RAM
PD[7:0] CTL[1:0] PHY_CLK LINK_ON LPS LREQ Link-Phy interface IDE_OE# RAM Manager ID[15:0] DMARQ ATA/ ATAPI manager Internal ARM7TDMI bus DIOW# DIOR# IORDY DMACK# INTRQ# IA[2:0] ORB Coprocessor ICS#[1:0]
D[15:0] A[16:0] CS#[3:0] OE# WE# INT# External Device interface
Internal FLASH
ARM7TDMI
EE_DO EE_DI EE_CK EE_CS GPIO / EEPROM interface SCRATCH RAM
Figure 1: OXFW911 Block Diagram
Data Sheet Rev 1.1
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