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Details, datasheet, quote on part number:P4C150-15SC
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| Part: | P4C150-15SC |
| Category: | Memory => SRAM => SRAM |
| Description: | Org = 1K X 4 ;; Features. = Common I/O, Chip Clear ;; ;; Taa (ns) = 10 to 25 ;; Package / Pins Dip = 24 ;; Package / Pins Soj = . ;; Package / Pins Soic / Sop = 24 |
| Company: | Performance Semiconductor Corp. |
| Datasheet: | Download P4C150-15SC datasheet File size : 85 kB |
| Request For quote: | Find where to buy P4C150-15SC
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Datasheet text preview:
P4C150
P4C150 ULTRA HIGH SPEED 1K X 4 RESETTABLE STATIC CMOS RAM
FEATURES
Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times) 10/12/15/20/25 ns (Commercial) 15/20/25/35 ns (Military) Chip Clear Function Low Power Operation 713 mW Active 10 ns (Commercial) 550 mW Active 25 ns (Commercial) Standard Pinout (JEDEC Approved) 24-Pin 300 mil DIP 24-Pin 300 mil SOIC 28-Pin LCC (350 x 550 mils) 24-Pin CERPACK Single 5V ± 10% Power Supply Separate Input and Output Ports Three-State Outputs Fully TTL Compatible Inputs and Outputs
DESCRIPTION
The P4C150 is a 4,096-bit ultra high-speed static RAM organized as 1K x 4 for high speed cache applications. The RAM features a reset control to enable clearing all words to zero within two cycle times. The CMOS memory requires no clocks or refreshing, and has equal access and cycle times. Inputs and outputs are fully TTL-compatible. The RAM operates from a single 5V ± 10% tolerance power supply. Access times as fast as 10 nanoseconds are available permitting greatly enhanced system operating speeds. Time required to reset is only 20 ns for the 10 ns SRAM. CMOS is used to reduce power consumption to a low level. The P4C150 is available in 24-pin 300 mil DIP and SOIC packages providing excellent board level densities. The device is also available in a 28-pin LCC package as well as a 24-pin FLATPACK for military applications.
FUNCTIONAL BLOCK DIAGRAM
A A A A A A I1 I2 I3 I4
PIN CONFIGURATIONS
ROW SELECT
4,096-BIT MEMORY ARRAY
A1 A2 A3 A4 A5 A6 I1 I2 O1 O2 G ND
2 3 4 5 6 7 8 9 10 11 12
23 22 21 20 19 18 17 16 15 14 13
A9 A8 A7 RS CS WE OE I4 I3 O 4 O 3
A2 A3 A4 A5 NC A6 I1 I2 O1
3 4 5 6 7 8 9 10 11 12 13 14 15 16 O3 NC 2 1 28
A1 A0
1
24
A9 27 26 25 24 23 22 21 20 19 18 17 O4
A0
V CC
NC
V CC
A8 A7 RS CS NC WE OE I4 I3
INPUT DATA CONTROL
O1 O2
COLUMN I/O
O3 O4
CS WE RS OE A
A
A
A
DIP (P4, D4), SOIC (S4) CERPACK (F4) SIMILAR TOP VIEW
Means Quality, Service and Speed
1Q97
25
O2 GND
COLUMN SELECT
LCC (L5) TOP VIEW
P4C150
MAXIMUM RATINGS(1)
Symbol VCC Parameter Power Supply Pin with Respect to GND Terminal Voltage with Respect to GND (up to 7.0V) Operating Temperature Value 0.5 to +7 0.5 to VCC +0.5 55 to +125 Unit V Symbol TBIAS TSTG V °C PT IOUT Parameter Temperature Under Bias Storage Temperature Power Dissipation DC Output Current Value 55 to +125 65 to +150 1.0 50 Unit °C °C W mA
VTERM TA
RECOMMENDED OPERATING CONDITIONS
Grade(2) Commercial Military Ambient Temp 0°C to 70°C -55°C to +125°C Gnd 0V 0V VCC 5.0V ± 10% 5.0V ± 10%
CAPACITANCES(4)
(VCC = 5.0V, TA = 25°C, f = 1.0MHz) Symbol CIN COUT Parameter Input Capacitance Conditions Typ. Unit VIN = 0V 5 7 pF pF
Output Capacitance VOUT= 0V
DC ELECTRICAL CHARACTERISTICS
Over recommended operating temperature and supply voltage (2) Symbol VOH VOL VIH VIL I LI I LO Parameter Output High Voltage (TTL Load) Output Low Voltage (TTL Load) Input High Voltage Input Low Voltage Input Leakage Current Output Leakage Current VCC = Max., VIN = GND to VCC VCC = Max., CS = VIH, VOUT = GND to VCC Test Conditions IOH = 4 mA, VCC = Min. IOL = +8 mA, VCC = Min 2.2 0.5(3) 5 5 2.4 P4C147 Min. Max. V Unit
0.4 VCC =+0.5 0.8 +5 +5
V V V µA µA
POWER DISSIPATION CHARACTERISTICS VS. SPEED
Symbol ICC Parameter Dynamic Operating Current Temperature Range Commercial Military -10 130 N/A -12 130 N/A -15 120 145 -20 115 135 -25 100 125 -35 N/A 120 Unit mA mA
Notes: 1. Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to MAXIMUM rating conditions for extended periods may affect reliability.
2. Extended temperature operation guaranteed with 400 linear feet per minute of air flow. 3. Transient inputs with VIL and IIL not more negative than 3.0V and 100mA, respectively, are permissible for pulse widths up to 20 ns. 4. This parameter is sampled and not 100% tested.
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P4C150
AC CHARACTERISTICS--READ CYCLE
(VCC = 5V ± 10%, All Temperature Ranges)(2)
Sym. t RC tAA tAC tOH tLZ tHZ t OE t OLZ tOHZ
Parameter Read Cycle Time Address Access Time Chip Select Access Time Output Hold from Address Change Chip Enable to Output in Low Z Chip Disable to Output in High Z Output Enable to Data Valid Output Enable to Output in Low Z Output Disable to Output in High Z 2 2 2 10
-10 12 10 8 2 2 4 7 2 5
-12 15 12 10 2 2 6 9 2 7
-15 20 15 12 2 2 8 10 2 9
-20
-25 25 20 14 2 2 10 14 2 11 13 13 15 2 25 15 2 2 35
-35
Unit ns
Min Max Min Max Min Max Min Max Min Max Min Max 35 35 ns ns ns ns 15 20 ns ns ns 16 ns
TIMING WAVEFORM OF READ CYCLE NO. 1(5,6)
(8)
t RC ADDRESS t AA t OH DATA OUT PREVIOUS DATA VALID DATA VALID
TIMING WAVEFORM OF READ CYCLE NO. 2 (CS CONTROLLED)(5, 7) CS
tRC CS t AC (7) t LZ DATA OUT
(8) (8)
t HZ
(8)
DATA VALID
(8)
HIGH IMPEDANCE
t OLZ
t OHZ t OE
OE
Notes: 5.WE is HIGH for READ cycle. 6.CS and OE are LOW for READ cycle. 7.ADDRESS must be valid prior to, or concident with, CS transition LOW, tAA must still be met.
8. Transition is measured ±200 mV from steady state voltage prior to change, with loading as specified in Figure 1. 9. Read Cycle Time is measured from the last valid address to the first transitioning address.
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