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Details, datasheet, quote on part number:P4C163-25LM
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| Part: | P4C163-25LM |
| Category: | Memory => SRAM => SRAM |
| Description: | Org = 8K X 9 ;; Features. = Common I/o ;; ;; Taa (ns) = 25 to 35 ;; Package / Pins Dip = 28 ;; Package / Pins Soj = 28 ;; Package / Pins Soic / Sop = |
| Company: | Performance Semiconductor Corp. |
| Datasheet: | Download P4C163-25LM datasheet File size : 87 kB |
| Request For quote: | Find where to buy P4C163-25LM
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Datasheet text preview:
P4C163/163L
P4C163/P4C163L ULTRA HIGH SPEED 8K x 9 STATIC CMOS RAMS
FEATURES
Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times) 25/35ns (Commercial) 25/35/45ns (Military) Low Power Operation (Commercial/Military) 690/800 mW Active 25 193/220 mW Standby (TTL Input) 5.5 mW Standby (CMOS Input) P4C163L Output Enable and Dual Chip Enable Control Functions Single 5V±10% Power Supply Data Retention with 2.0V Supply, 10 µA Typical Current (P4C163L Military) Common I/O Fully TTL Compatible Inputs and Outputs Standard Pinout (JEDEC Approved) 28-Pin 300 mil DIP, SOJ 28-Pin 350 x 550 mil LCC 28-Pin CERPACK
DESCRIPTION
The P4C163 and P4C163L are 73,728-bit ultra high-speed static RAMs organized as 8K x 9. The CMOS memories require no clocks or refreshing and have equal access and cycle times. Inputs are fully TTL-compatible. The RAMs operate from a single 5V±10% tolerance power supply. With battery backup, data integrity is maintained for supply voltages down to 2.0V. Current drain is 10 µA from a 2.0V supply. Access times as fast as 25 nanoseconds are available, permitting greatly enhanced system operating speeds. CMOS is used to reduce power consumption in both active and standby modes. The P4C163 and P4C163L are available in 28-pin 300 mil DIP and SOJ and 28-pin 350 x 550 mil LCC packages providing excellent board level densities.
FUNCTIONAL BLOCK DIAGRAM
A0
ROW SELECT 73,728-BIT MEMORY ARRAY
PIN CONFIGURATIONS
VCC A2 A1 A0 WE
A0 A1 A2 A3 A4 A5
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
V CC WE CE 2 A12 A 11 A10 OE A9 CE1 I/O 9 I/O 8 I/O 7 I/O 6 I/O 5
3 A3 A4 A5 A6 A7 A8 I/O 1 I/O 2 I/O 3 4 5 6 7 8 9 10 11 12 13 2
27 28 26 1 25 24 23 22 21 20 19
CE 2 A 12 A 11 A 10 OE A9 CE 1 I/O9 I/O8
A7 I/O 1
INPUT DATA CONTROL COLUMN I/O
A6 A7 A8 I/O1
COLUMN SELECT
I/O 9
I/O2 I/O3 I/O4 GND
14 15 16
18 17
GND I/O5
I/O4
I/O6
CE 1 CE 2 WE OE
A8
A 12
DIP (P5, C5), SOJ (J5) CERPACK (F4) SIMILAR TOP VIEW
LCC (L5) TOP VIEW
Means Quality, Service and Speed
1Q97
109
I/O7
P4C163/163L
MAXIMUM RATINGS(1)
Symbol VCC Parameter Power Supply Pin with Respect to GND Terminal Voltage with Respect to GND (up to 7.0V) Operating Temperature Value 0.5 to +7 0.5 to VCC +0.5 55 to +125 Unit V Symbol TBIAS TSTG PT I OUT Parameter Temperature Under Bias Storage Temperature Power Dissipation DC Output Current Value 55 to +125 65 to +150 1.0 50 Unit °C °C W mA
VTERM TA
V °C
RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE
Grade(2) Military Ambient Temperature 55 to +125°C GND 0V VCC 5.0V ± 10% Grade(2) Commercial Ambient Temperature 0°C to +70°C GND 0V VCC 5.0V ± 10%
DC ELECTRICAL CHARACTERISTICS
Over recommended operating temperature and supply voltage(2)
Symbol VIH VIL VHC VLC VCD VOL VOLC VOH VOHC ILI ILO
Parameter Input High Voltage Input Low Voltage CMOS Input High Voltage CMOS Input Low Voltage Input Clamp Diode Voltage Output Low Voltage (TTL Load) Output Low Voltage (CMOS Load) Output High Voltage (TTL Load) Output High Voltage (CMOS Load) Input Leakage Current Output Leakage Current
Test Conditions
P4C163 Min 2.2 0.5(3) 0.5
(3)
P4C163L Min 2.2 0.5(3) 0.5
(3)
Max VCC+0.5 0.8 0.2 1.2 0.4 0.2
Max VCC+0.5 0.8 0.2 1.2 0.4 0.2
Unit V V V V V V V V V
VCC0.2 VCC+0.5 VCC = Min., IIN = 18 mA IOL = +8 mA, VCC = Min. IOLC = +100 µA, VCC = Min. IOH = 4 mA, VCC = Min. IOHC = 100 µA, VCC = Min. VCC = Max. VIN = GND to VCC VCC = Max., CE = VIH, VOUT= GND to VCC Mil. Com'l. Mil. Com'l. 2.4 VCC0.2 10 5 10 5 +10 +5 +10 +5
VCC0.2 VCC+0.5
2.4 VCC0.2 5 N/A 5 N/A +5 N/A +5 N/A
µA µA
CAPACITANCES(4)
(VCC = 5.0V, TA = 25°C, f = 1.0MHz) Symbol CIN Parameter Input Capacitance Conditions Typ. Unit VIN = 0V 5 pF Symbol COUT Parameter Output Capacitance Conditions Typ. Unit VOUT = 0V 7 pF
Notes: 1. Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to MAXIMUM rating conditions for extended periods may affect reliability.
2. Extended temperature operation guaranteed with 400 linear feet per minute of air flow. 3. Transient inputs with VIL and IIL not more negative than 3.0V and 100mA, respectively, are permissible for pulse widths up to 20 ns. 4. This parameter is sampled and not 100% tested.
110
P4C163/163L
POWER DISSIPATION CHARACTERISTICS
Over recommended operating temperature and supply voltage(2) Symbol I CC I CC ISB Parameter Dynamic Operating Current 25 Dynamic Operating Current 35, 45 Test Conditions VCC = Max., f = Max., Outputs Open VCC = Max., f = Max., Outputs Open Mil. Com'l. Mil. Com'l. Mil. Com'l. Mil. Com'l. P4C163 Min -- -- -- -- -- -- -- -- Max 145 125 120 95 40 35 20 18 P4C163L Min -- -- -- -- -- -- -- -- Max 145 N/A 120 N/A 40 N/A 1 N/A Unit mA mA mA
Standby Power Supply CE1 VIH or Current (TTL Input Levels) CE2 VIL, VCC = Max., f = Max., Outputs Open Standby Power Supply Current (CMOS Input Levels) CE1 VHC or CE2 VLC, VCC = Max., f = 0, Outputs Open, VIN VLC or VIN VHC
ISB1
mA
n/a = Not Applicable
DATA RETENTION CHARACTERISTICS (P4C163L, Military Temperature Only)
Symbol VDR ICCDR tCDR tR Parameter VCC for Data Retention Data Retention Current Chip Deselect to Data Retention Time Operation Recovery Time CE1 VCC 0.2V or CE2 0.2V, VIN VCC 0.2V or VIN 0.2V Test Condition Min 2.0 10 0 t R C§ 15 200 300 Typ.* VCC= 2.0V 3.0V Max V CC = 2.0V 3.0V Unit V µA ns ns
*TA = +25°C § tRC = Read Cycle Time This parameter is guaranteed but not tested.
DATA RETENTION WAVEFORM
DATA RETENTION MODE VCC t CDR CE 1 VDR VHC VLC VHC VLC 4.5V VDR 2V 4.5V tR
CE 2
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