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Details, datasheet, quote on part number:PI2BV3868A
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| Part: | PI2BV3868A |
| Category: | Interface and Interconnect => Mux/Demux/Switch Digital Bus |
| Description: | 3.3V, 10-Bit 2:1 Mux/demux Switch W/25 Ohm Resistor |
| Company: | Pericom Semiconductor Corporation |
| Datasheet: | Download PI2BV3868A datasheet File size : 148 kB |
| Request For quote: | Find where to buy PI2BV3868A
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Datasheet text preview:
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PI2BV3868
3.3V, 20:10 DDR Mux/Demux Bus Switch w/Dual Enables
Product Features
· · · · · · Near-zero propagation delay 20-ohm switches connect inputs to outputs Fast Switching Speed : 2.5ns Low Off Capacitance : 3pF Pull-down on B output Packages available: 48-pin 150 Mil (3.9mm) Wide BQSOP (B) 48-pin 240 Mil (6.1mm) Wide TSSOP (A)
Product Description
Pericom Semiconductor's PI2B series of logic circuits are produced using the Company's advanced submicron CMOS technology, achieving industry leading performance. The PI2BV3868 is a 20:10, 3.3V Mux/Demux bus switch designed with a low ON-resistance allowing inputs to be connected directly to outputs. The bus switch creates no additional propagation delay or additional ground bounce noise. The switches are turned ON by two Low Enable Select (SEL) signals. The PI2BV3868 switch can be used for High-Performance Memory Module Applications, where the seperate SELECTS allow for transferring clock, address, or data to two destinations.
Logic Block Diagram
A0 1B0
Pin Configuration
1B0 2B0 VCC A1 GND 1B2 2B2 VCC A3 GND 1B4 2B4 VCC A5 GND 1B6 2B6 VCC A7 GND 1B8 2B8 A9 SEL2 1 2 3 4 5 6 7 8 9 10 11 48-Pin 12 A, B 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 A0 GND 1B1 2B1 VCC A2 GND 1B3 2B3 VCC A4 GND 1B5 2B5 VCC A6 GND 1B7 2B7 VCC A8 1B9 2B9 SEL1
2B0
A9
1B9
2B9 SEL1 SEL2
Pin Description
Pin Name SELY AX
YBX
De s cription Bus Enable Input Demux Inputs Mux Inputs Ground Power
Truth Table
Function AX to 1BX; Terminate 2BX AX to 2BX; Terminate 1BX nA to nB1 and nB2 nB1, nB2 = Hi- Z SEL1 L H L H SEL2 H L L H
GND VC C
Notes: H = High Voltage Level; L = Low Voltage Level X = 0 through 9; Y = 1 or 2
1
PS8612A
09/16/02
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI2BV3868 3.3V, 20:10 DDR Mux/Demux Bus Switch with Dual Enables
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Note: Storage Temperature ....... 65°C to +150°C Stresses greater than those listed under MAXIMUM Ambient Temperature with Power Applied ....... 40°C to +85°C RATINGS may cause permanent damage to the device. Supply Voltage to Ground Potential ..... 0.5V to +4.6V This is a stress rating only and functional operation of the device at these or any other conditions above those DC Input Voltage .......... 0.5V to +4.6V indicated in the operational sections of this specification DC Output Current .......... 120mA is not implied. Exposure to absolute maximum rating conPower Dissipation .... 0.5W ditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = 40°C to +85°C, VCC = 3.3V±10%)
Pa ra me te rs VIH VIL VIK IIH/IIL RO N RP/D D e s criptio n Inp ut HIGH Vo ltage Inp ut LO W Vo ltage C lamp Dio d e Vo ltage Inp utHigh/Lo w C urrent S witch O N Resistance(4) P ull- Do wn Resistance(5) Te s t Co nditio ns Guaranteed Lo gic HIGH Level Guaranteed Lo gic LO W Level VC C = Min. , IIN = 18 mA VC C = Max. , VIN = VC C o r GN D VC C = Min. , VIN = 0 . 9 V, IO N = 2 0 mA VC C = Min. , VIN = 1. 6 V, IO N = 15 mA VBIAS(B- Ports) = 1. 8 V. , IO ZH 18 0 µA 10 M in. 1.6 0.3 Typ.(2) 17 22 M ax. VC C +0.3 0.9 1.2 ± 10 33 30 µA O hm kO hm Units
V
Capacitance (TA = 25°C, f = 1 MHz)
Pa ra me te rs (1) C IN C O FF(A) C O FF (B) C O N (A/B) D e s criptio n Inp ut C ap acitance A C ap acitance, S witch O ff B C ap acitance, S witch O ff A/B C ap acitance, S witch O n VIN = 0 V Te s t Co nditio ns Typ. 3 4 2 6 pF Units
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, TA = 25°C ambient and maximum loading. 3. Measured by the voltage drop between A and B pin at indicated current through the switch. ON resistance is determined by the lower of the voltages on the two (A,B) pins. 4. This parameter is determined by device characterization but is not production tested. 5. Pull-down resistance is measured with the switch OFF and calculated by VBIAS(B-Port) / IOZH.
Power Supply Characteristics
Parame te rs ICC De s cription Quiescent Power Supply Current Te s t Conditions (1) VCC = Max, VIN = GND or VCC M in. Typ(2) M ax. 10 Units µA
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at VCC = 3.3V, +25°C ambient. 3. Per LVTTL driven input (control input only); A and B pins do not contribute to ICC.
2
PS8612A
09/16/02
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI2BV3868 3.3V, 20:10 DDR Mux/Demux Bus Switch with Dual Enables
Switching Characteristics over Operating Range
Parame te rs D e s cription Conditions (1) M in. fO ATA tPLH tPHL tPZH tPZL tPHZ tPLZ Max Data Frequency(8) Propagation Delay (2,3,7) AN to BN , BN to AN (tPD) Bus Enable Time(6) SEL to AN , BN Bus Disable Time(5) SEL to AN , BN C L = 4pF RL = 500 ohms 0.6 0.6 0.6 0.6 PI2B V3868 Com. Typ. 0.5 M ax. 266
1 2.5 2.5 1.8 1.8
Units
MHz ns
Parameter Measurements
500 S1 2xVCC Open GND
From Output Under Test CL = 4pF (See note 1)
Te s t tPD tPLZ/tPZL tPHZ/tPZH
S1 O p en 2xVC C GN D
500
Load Circuit
VCC Input tPLH VCC/2 VCC/2 0V tPHL VOH Output VCC/2 VCC/2 VOL
Output Control (Low Level Enabling) Output Waveform 1 S1 at 2xVCC (see Note 2) Output Waveform 2 S1 at GND (see Note 2)
VCC VCC/2 tP Z L VCC/2 VOL +0.15V tP Z H VCC/2 tP H Z VO H VOH -0.15V 0V VO L VCC/2 0V tP L Z VOH
Voltage Waveforms Propagation Delay Times
Voltage Waveforms Enable and Disable Times
Notes: 1. CL includes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is LOW except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is HIGH except when disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR<10MHz, ZO = 50 ohms, tR 2ns, tF 2ns. 4. The outputs are measured one at a time with one transition per measurement. 5. tPLZ and tPHZ are the same as tDIS. 6. tPZL and tPZH are the same as tEN. 7. tPLH and tPHL are the same as tPD. 8. Guaranteed by design, but not production tested.
3
PS8612A
09/16/02
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