Details, datasheet, quote on part number: PI4S706SH
PartPI4S706SH
CategoryPower Management => Supervisory Circuits => Microprocessor Supervisors
Description4.63V Reset Active Low Supervisor
CompanyPericom Semiconductor Corporation
DatasheetDownload PI4S706SH datasheet
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Features, Applications

Precision supply-voltage monitor PI4S708R) 200ms reset pulse width Debounced TTL/CMOS-compatible manualreset input Independent watchdog timer with 1.6sec time-out 706x, 706xH, and 813L ONLY Reset output signal: - Active-low only 706R) - Active-high only 706P) - Active-high and active-low 708S, 708R) Voltage monitor for power-fail or low battery warning Guaranteed RESET/RESET valid at VCC = 1.2V

Description

The PI4S70xxx/PI4S813L family microprocessor (ÁP) supervisory circuits are targeted to improve reliability and accuracy of power-supply circuitry in ÁP systems. These devices reduce the complexity and number of components required to monitor power-supply and battery functions. The main functions are: 1. Asserting reset output during power-Áp, power-down and brownout conditions for ÁP systems. 2. Detecting power failure or low-battery conditions with a 1.25V threshold detector. 3. Generating an independent watchdog output that goes low if the watchdog input has not been toggled within 1.6 seconds. 4. Asserting reset output with an active-low manual-reset input

Applications

Computers Controllers Intelligent Instruments Automotive Systems Printers Critical Microprocessor Power Monitoring

Pin Name MR VCC GND PFI PFO Type Input Power Ground Input Output Description Manual-Reset: triggers a reset pulse when pulled below 0.8V, active low. It has an internal 250A pull-up current and can be driven from a TTL or CMOS logic line as well as shorted to ground with a switch. Power Supply Ground Reference for all signals Power-Fail Voltage Monitor Input: When PFI is less than 1.25V, PFO goes low. Connect PFI to GND or Vcc when not used. Power-Fail Output: it gets low and sinks current when PFI is less than 1.25V; otherwise PFO stays high. Watchdog Input: If WDI remains high or low for 1.6sec, the internal watchdog timer runs out and WDO goes low. Floating WDI or connecting WDI to a high-impedance three-state buffer disables the watchdog feature. The internal watchdog timer clears whenever reset is asserted, WDI is three-stated, or WDI sees a rising or falling edge. No Connect Output Reset Output pulses: low for 200ms when triggered, and stays low whenever Vcc is below the reset threshold. It remains low for 200ms after VCC rises above the reset threshold or MR goes from low to high. A watchdog timeout will not trigger RESET unless WDO is connected to MR. Watchdog Output: pulls low when the internal watchdog timer finishes its 1.6sec count and does not go high again until the watchdog is cleared. WDO also goes low during low-line conditions. Whenever Vcc is below the reset threshold, WDO stays low; however, unlike RESET, WDO does not have minimum pulse width. As soon as VCC rises above the reset threshold, WDO goes high with no delay. The inverse of RESET: active high. Whenever RESET is high, RESET is low.



 

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