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Details, datasheet, quote on part number:PI74ALVCH16260V
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Datasheet text preview:
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16260
12-Bit To 24-Bit Multiplexed D-Type Latch with 3-State Outputs
Product Description
Product Features
· · · · · · · · PI74ALVCH16260 is designed for low voltage operation VCC = 2.3V to 3.6V Hysteresis on all inputs Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25°C Typical VOHV (Output VOH Undershoot) < 2.0V at VCC = 3.3V, TA = 25°C Bus Hold retains last active bus state during 3-State, eliminating the need for external pullup resistors Industrial operation at 40°C to +85°C Packages available: 56-pin 240 mil wide plastic TSSOP (A) 56-pin 300 mil wide plastic SSOP (V)
Pericom Semiconductors PI74ALVCH series of logic circuits are produced using the Companys advanced 0.5 micron CMOS technology, achieving industry leading speed. The PI74ALVCH16260 is a 12-bit to 24-bit multiplexed D-type latch designed for 2.3V to 3.6 VCC operation. It is used in applications where two separate datapaths must be multiplexed onto, or demultiplexed from, a single data path. Typical applications include multiplexing and/or demultiplexing address and data information in microprocessor or bus-interface and in memory-interleaving. Three 12-bit I/O ports (A1-A12, 1B1-1B12, and 2B1-2B12) are available for address and/or data transfer. The output-enable (OE1B, OE2B, and OEA) inputs control bus transceiver functions. The OE1B and OE2B control signals also allow bank control in the A-to-B direction. Address and/or data information can be stored using the internal storage latches. The latch-enable (LE1B, LE2B, LEA1B, and LEA2B) inputs are used to control data storage. When the latch-enable input is HIGH, the latch is transparent. When the latch-enable input goes LOW, the data present at the inputs is latched and remains latched until the latch-enable input is returned HIGH. To ensure high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor whose minimum value is determined by the current-sinking capability of the driver.
Logic Block Diagram
LE1B 2 LE2B 27 30 LEA1B LEA2B 55 OE2B OE1B OEA
56 29
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
1
SEL 28 G1 A1
8
C1 1 1 C1 1D C1 1D 6 2B1 23 1D 1B1
C1 1D
TO 11 OTHER CHANNELS
1
PS8089C
04/17/01
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16260 12-Bit To 24-Bit Multiplexed D-Type Latch with 3-State Outputs
Truth Tables(1) Product Pin Description
Pin Name OE SEL LE A,1B,2B A,1B, 2B G ND VC C Description Output Enable Input (Active LOW) Select Latch Enable Data Inputs 3-State Outputs Ground Power
1B H L X X X X X 2B X X X H L X X
B to A (OEB = H)
Inputs SEL H H H L L L X LE1B H H L X X X X LE2B X X X H H L X OEA L L L L L L H Output A H L A0 H L A0 Z
Product Pin Configuration
OEA LE1B 2B3 GND 2B2 2B1 VCC A1 A2 A3 GND A4 A5 A6 A7 A8 A9 GND A10 A11 A12 VCC 1B1 1B2 GND 1B3 LE2B SEL 1 2 3 4 5 6 7 8 9 10 56 55 54 53 52 51 50 49 48 47 OE2B LEA2B 2B4 GND 2B5 2B6 VCC 2B7 2B8 2B9 GND 2B10 2B11 2B12 1B12 1B11 1B10 GND 1B9 1B8 1B7 VCC 1B6 1B5 GND 1B4 LEA1B OE1B
A to B (OEA = H)
Inputs A H L H L H L X X X X X LEA1B LEA2B OE1B H H H H L L L X X X X H H L L H H L X X X X L L L L L L L H L H L OE2B L L L L L L L H H L L Outputs 1B H L H L 1B0 1B0 1B0 Z Active Z Active 2B H L 2B0 2B0 H L 2B0 Z Z Active Active
11 56-Pin 46 12 A, V 45 13 44 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
Note: 1. H = High Signal Level L = Low Signal Level X = Irrelevant Z = High Impedance
2
PS8089C
04/17/01
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16260 12-Bit To 24-Bit Multiplexed D-Type Latch with 3-State Outputs
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ....... 65°C to +150°C Ambient Temperature with Power Applied ........ 40°C to +85°C Input Voltage Range, VIN ........... 0.5V to VCC +0.5V Output Voltage Range, VOUT .... 0.5V to VCC +0.5V DC Input Voltage .......... 0.5V to +5.0V DC Output Current ........... 100mA Power Dissipation ...... 1.0W
Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = 40°C to +85°C, VCC = 3.3V ± 10%)
Parame te rs VCC VIH(3) VIL(3) VIN
(3)
De s cription Supply Voltage Input HIGH Voltage Input LOW Voltage Input Voltage Output Voltage Output HIGH Voltage
Te s t Conditions (1) VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V
M in. 2.3 1.7 2.0
Typ.(2)
M ax. 3.6
Units
0.7 0.8 0 0 VCC VCC
VOUT(3) VOH
IOH = - 100µA, VCC = Min. to Max. VIH = 1.7V, IOH = 6mA, VCC = 2.3V VIH = 1.7V, IOH = 12mA, VCC = 2.3V VIH = 2.0V, IOH = 12mA, VCC = 2.7V VIH = 2.0V, IOH = 12mA, VCC = 3.0V VIH = 2.0V, IOH = 24mA, VCC = 3.0V
VCC - 0.2 2.0 1.7 2.2 2.4 2.0 0.2 0.4 0.7 0.4 0.55 12 12 24 12 12 24 mA V
VOL
Output LOW Voltage
IOL = 100µA, VIL = Min. to Max. VIL = 0.7V, IOL = 6mA, VCC = 2.3V VIL = 0.7V, IOL = 12mA, VCC = 2.3V VIL = 0.8V, IOL = 12mA, VCC = 2.7V VIL = 0.8V, IOL = 24mA, VCC = 3.0V
IOH(3)
Output HIGH Current
VCC = 2.3V VCC = 2.7V VCC = 3.0V
IOL(3)
Output LOW Current
VCC = 2.3V VCC = 2.7V VCC = 3.0V
3
PS8089C
04/17/01
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