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Part: PI74FCT16646T
Category:
Logic
-> Bus Interface
-> Bus Oriented Circuits
Description: 16-Bit Registered Transceiver
Company: Pericom Semiconductor Corporation
Datasheet: Download PI74FCT16646T datasheet File size : 313 kB
Request For quote: Find where to buy PI74FCT16646T
Datasheet text preview:
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16646T PI74FCT162646T PI74FCT162H646T
Fast CMOS 16-Bit Registered Transceivers
Product Features
Common Features: PI74FCT16646T, PI74FCT162646T, and PI74FCT162H646 are high-speed, low power devices with high current drive VCC = 5V ± 10% Hysteresis on all inputs Packages available: 56-pin 240 mil wide plastic TSSOP (A) 56-pin 173 mil wide plastic TVSOP (JEDEC TSSOP K) 56-pin 300 mil wide plastic SSOP (V) PI74FCT16646T Features: High output drive: IOH = 32mA; IOL = 64mA Power off disable outputs permit live insertion Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C PI74FCT162646T Features: Balanced output drivers: ±24mA Reduced system switching noise Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V, TA = 25°C PI74FCT162H646T Features: Bus Hold retains last active bus state during Three-state Eliminates the need for external pull-up resistors
Product Description
Pericom Semiconductors PI74FCT series of logic circuits are pro duced in the Companys advanced 0.6 micron CMOS technology, achieving industry leading speed grades. The PI74FCT16646T, PI74FCT162646T, and PI74FCT162H646 are 16-bit registered transceivers organized as two independent 8-bit bus transceivers designed with 3-state D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Each 8-bit transceiver utilizes the enable control (xOE) and direction pins (xDIR) to control the transceiver functions. The Select (xSAB and xSBA) control pins are used to select either real-time or stored data transfer. The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between real-time and stored data. A low input level selects real-time data and a high selects stored data. The PI74FCT16646T output buffers are designed with a Power-Off disable allowing live insertion of boards when used as backplane drivers. The PI74FCT162646T has ±24mA balanced output drivers. It is designed with current limiting resistors at its outputs to control the output edge rate resulting in lower ground bounce and undershoot. This eliminates the need for external terminating resistors for most interface applications. The PI74FCT162H646T has Bus Hold which retains the inputs last state whenever the input goes to high-impedance preventing floating inputs and eliminating the need for pull-up/down resistors.
Logic Block Diagram
1OE 1DIR 1CLKBA 1SBA 1SAB 1CLKAB
2OE 2DIR 2CLKBA 2SBA 2SAB 2CLKAB
B REG D C
1A0
B REG D C
1B0 2A0
A REG D C
A REG D C
2B0
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
1
PS2039B
02/24/99
Product Pin Configuration
1DIR 1CLKAB 1SAB
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16646T/162646T/162H646T 16-Bit Registered Transceivers
Truth Table
Function/Operation Isolation Store A and B Data Real Time B Data to A Bus Stored B Data to A Bus Real Time A Data to B Bus Stored A Data to B Bus xOE H H L L L L
XDIR
X X L L H H
Inputs XCLKAB XCLKBA H or L H or L X X X H or L X X H or L X
XSAB
XSBA
X X X X L H
X X L H X X
DATA I/O(2) XAX XBX Input Input Output Input Input Output
Notes: 1.The data output functions may be enabled or disabled by various signals at the xOE or xDIR inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every low-to-high transition on the clock inputs. 2. Select control = L: clocks can occur simultaneously. Select control = H: clocks must be staggered to load both registers. H = High Voltage Level; L = Low Voltage Level; X = Don't Care; = LOW-to-HIGH transition
Product Pin Description
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
1OE 1CLKBA 1SBA
GND
1A0 1A1
VCC
1A2 1A3 1A4
GND
1A5 1A6 1A7 2A0 2A1 2A2
GND
2A3 2A4 2A5
VCC
2A6 2A7
1 2 3 4 5 6 7 8 9 10 5 6 - P I N V56 11 A56 12 K56 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
Pin Name xAx(1) xBx(1) xCLKAB, xCLKBA SAB, SBA xDIR, xOE GND V CC
GND
1B0 1B1
VCC
1B2 1B3 1B4
Description Data Register A Inputs Data Register B Outputs Data Register B Inputs Data Register A Outputs Clock Pulse Inputs Output Data Source Select Inputs Output Enable Inputs Ground Power
GND
1B5 1B6 1B7 2B0 2B1 2B2
Note: 1.For the PI74FCT162H646T, these pins have "Bus Hold." All other pins are standard, outputs, or I/Os.
GND
2B3 2B4 2B5
VCC
2B6 2B7
GND
2SAB 2CLKAB 2DIR
GND
2SBA 2CLKBA 2OE
2
PS2039B
02/24/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16646T/162646T/162H646T 16-Bit Registered Transceivers
REAL-TIME TRANSFER BUS B TO A
REAL-TIME TRANSFER BUS A TO B
BUS A
BUS B
BUS A
BUS B
xDIR xOE L L
xCLKAB X
xCLKBA X
xSAB X
xSBA L
xDIR xOE H L
xCLKAB X
xCLKBA X
xSAB L
xSBA X
STORAGE FROM A AND/OR B
TRANSFER STORES DATA TO A AND/OR B
BUS A
BUS B
BUS A
BUS B
xDIR xOE H L L L X H
xCLKAB X
xCLKBA X
xSAB X X X
xSBA X X X
xDIR xOE L L H L
xCLKAB X H or L
xCLKBA H or L X
xSAB X H
xSBA H X
3
PS2039B
02/24/99
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