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Part: PI74FCT16652TV

Category:
 Logic
   -> Bus Interface
             -> Bus Oriented Circuits

Description: 16-Bit Registered Transceiver

Company: Pericom Semiconductor Corporation

Datasheet: Download PI74FCT16652TV datasheet     File size : 313 kB

Request For quote: Find where to buy PI74FCT16652TV



Datasheet text preview:
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16652/162652T 16-BIT REGISTERED TRANSCEIVERS
PI74FCT16652T PI74FCT162652T
Product Features:
Common Features: · PI74FCT16652T and PI74FCT162652T are high-speed, low power devices with high current drive. · Vcc = 5V ±10% · Hysteresis on all inputs · Packages available: ­ 56-pin 240 mil wide plastic TSSOP (A) ­ 56-pin 300 mil wide plastic SSOP (V) PI74FCT16652T Features: · High output drive: IOH = ­32 mA; IOL = 64 mA · Power off disable outputs permit "live insertion" · Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C PI74FCT162652T Features: · Balanced output drivers: ±24 mA · Reduced system switching noise · Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V, TA = 25°C
Fast CMOS 16-Bit Registered Transceivers
Product Description:
Pericom Semiconductor's PI74FCT series of logic circuits are produced in the Company's advanced 0.8 micron CMOS technology, achieving industry leading speed grades. The PI74FCT16652T and PI74FCT162652T are 16-bit registered transceivers organized as two independent 8-bit bus transceivers designed with 3-state D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Each 8-bit transceiver utilizes the enable controls (xOEAB and x OEBA) to control the transceiver functions. The Select (xSAB and xSBA) control pins are used to select either real-time or stored data transfer. The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between real-time and stored data. A low input level selects real-time data and a high selects stored data. The PI74FCT16652T output buffers are designed with a PowerOff disable allowing "live insertion" of boards when used as backplane drivers. The PI74FCT162652T has ±24 mA balanced output drivers. It is designed with current limiting resistors at its outputs to control the output edge rate resulting in lower ground bounce and undershoot. This eliminates the need for external terminating resistors for most interface applications.
Logic Block Diagram
1OEAB 2OEAB
1OEBA
2OEBA
1CLKBA 1SBA
2CLKBA 2SBA
1CLKAB 1SAB
2CLKAB 2SAB
B REG D C
B REG D C
1 A0
2A0
A REG D C
1B0
A REG D C
2B0
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
1
PS2079A 01/15/95
Product Pin Configuration
1OEAB 1CLKAB 1SAB
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16652/162652T 16-BIT REGISTERED TRANSCEIVERS
Truth Table
Inputs DATA I/O(2)
XSAB XSBA
Function/Operation Isolation Store A and B Data Store A, Hold B Store A in Both Registers Hold A, Store B Store B in Both Registers Real Time B Data to A Bus Stored B Data to A Bus Real Time A Data to B Bus Stored A Data to B Bus Stored A Data to B Bus and Stored B Data to A Bus 1.
xOEAB L L X H L L L L H H H
X OEBA
X CLKAB
X CLKBA
H H H H X L L L H H L
H or L H or L X X X H or L H or L
H or L H or L X H or L X X H or L
X X X X(2) X X X X L H H
X X X X X X(2) L H X X H
XAX Input
XBX Input
Input Unspecified(1) Input Output (1) Unspecified Input Output Input Output Input I nput Output Output Output
2.
The data output functions may be enabled or disabled by various signals at the xOEAB or xOEBA inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every low-to-high transition on the clock inputs. Select control = L: clocks can occur simultaneously. Select control = H: clocks must be staggered in order to load both registers. H = High Voltage Level; L = Low Voltage Level; X = Don't Care; = LOW-to-HIGH transition
Product Pin Description
56 55 54 53 52 51 50 49 48
1OEBA 1CLKBA 1SBA
1 2 3 4 5 6 7 8 9
Pin Name xAx xBx xCLKAB, xCLKBA SAB, SBA xOEAB, xOEBA GND VCC
GND
1A0 1A1
GND
1B0 1B1
VCC
1A2 1A3 1A4
VCC
1B2 1B3 1B4
GND
1A5 1A6 1A7 2A0 2A1 2A2
10 47 11 46 12 5 6 - P I N 45 V 5 6 44 13 A56 14 43 15 16 17 18 19 20 21 22 23 24 25 26 27 28 42 41 40 39 38 37 36 35 34 33 32 31 30 29
GND
1B5 1B6 1B7 2B0 2B1 2B2
Description Data Register A Inputs Data Register B Outputs Data Register B Inputs Data Register A Outputs Clock Pulse Inputs Output Data Source Select Inputs Output Enable Inputs Ground Power
GND
2A3 2A4 2A5
GND
2B3 2B4 2B5
VCC
2A6 2A7
VCC
2B6 2B7
GND
2SAB 2CLKAB 2OEAB
GND
2SBA 2CLKBA 2OEBA
2
PS2079A 01/15/95
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16652/162652T 16-BIT REGISTERED TRANSCEIVERS
REAL-TIME TRANSFER BUS B TO A
REAL-TIME TRANSFER BUS A TO B
BUS A
BUS B
BUS A
BUS B
xOEAB xOEBA xCLKAB xCLKBA xSAB xSBA L L X X X L
xOEAB xOEBA xCLKAB xCLKBA xSAB xSBA H H X X L X
STORAGE FROM A AND/OR B
TRANSFER STORES DATA TO A AND/OR B
BUS A
BUS B
BUS A
BUS B
xOEAB X L L
xOEBA xCLKAB xCLKBA H X X X H
xSAB xSBA X X X X X X
xOEAB xOEBA xCLKAB xCLKBA xSAB xSBA H L H or L H or L H H
3
PS2079A 01/15/95


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