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Part: 74ABT2953N
Category:
Logic
-> Transceivers
-> Registered transceivers
Description: 74ABT2953; Octal Registered Transceiver, Inverting (3-State);; Package: SOT137 (SO24), SOT222-1 (DIP24), SOT340-1 (SSOP24), SOT355-1 (TSSOP24)
Company: Philips Semiconductors
Datasheet: Download 74ABT2953N datasheet File size : 294 kB
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Philips Semiconductors
Product specification
Octal registered transceiver, inverting (3-State)
74ABT2953
FEATURES
· 8-bit registered transceiver · Independent registers for A and B buses · Output capability: +64mA/32mA · Latch-up protection exceeds 500mA per Jedec Std 17 · ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74ABT2953 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT2953 device is an 8-bit registered inverting transceiver. Two 8-bit back-to-back registers store data flowing in both directions between two bidirectional buses. Data applied to the inputs is entered and stored on the rising edge of the Clock (CPXX) provided that the Clock Enable (CEXX) is Low. The data is then present at the 3-State output buffers, but is only accessible when the Output Enable (OEXX) is Low. Data flow from A inputs to B outputs is the same as for B inputs to A outputs.
· Live insertion/extraction permitted · Power-up 3-State · Power-up reset
QUICK REFERENCE DATA
SYMBOL tPLH tPHL CIN CI/O ICCZ PARAMETER Propagation delay CPBA to An or CPAB to Bn Input capacitance I/O capacitance Total supply current
CONDITIONS Tamb = 25°C; GND = 0V CL = 50pF; VCC = 5V VI = 0V or VCC Outputs disabled; VO = 0V or VCC Outputs disabled; VCC =5.5V
TYPICAL 5.0 4 7 500
UNIT ns pF pF nA
ORDERING INFORMATION
PACKAGES 24-Pin Plastic DIP 24-Pin plastic SO 24-Pin Plastic SSOP Type II 24-Pin Plastic TSSOP Type I TEMPERATURE RANGE 40°C to +85°C 40°C to +85°C 40°C to +85°C 40°C to +85°C OUTSIDE NORTH AMERICA 74ABT9253 N 74ABT2953 D 74ABT2953 DB 74ABT2953 PW NORTH AMERICA 74ABT2953 N 74ABT2953 D 74ABT2953 DB 74ABT2953PW DH DWG NUMBER SOT222-1 SOT137-1 SOT340-1 SOT355-1
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER SYMBOL CPAB / CPBA CEAB / CEBA A0 A7 B0 B7 OEAB / OEBA GND VCC NAME AND FUNCTION Clock input A to B / Clock input B to A Clock enable input A to B / Clock enable input B to A Data inputs/outputs (A side) Data outputs/outputs (B side) Output enable inputs Ground (0V) Positive supply voltage
B7 B6 B5 B4 B3 B2 B1 B0 OEAB
1 2 3 4 5 6 7 8 9
24 23 22 21 20 19 18 17 16 15 14 13 TOP VIEW
V CC A7 A6 A5 A4 A3 A2 A1 A0 OEBA CPBA CEBA
10, 14 11, 13 16, 17, 18, 19, 20, 21, 22, 23 1, 2, 3, 4, 5, 6, 7, 8 9, 15 12 24
CPAB 10 CEAB 11 GND 12
SA00305
1995 Sep 06
1
853-1555 15702
Philips Semiconductors
Product specification
Octal registered transceiver, inverting (3-State)
74ABT2953
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
11 13 16 17 18 19 20 21 22 23 15 9 A0 A1 A2 A3 A4 A5 A6 A7 10 11 14 13 CPAB CEAB CPBA CEBA B0 B1 B2 B3 B4 B5 B6 B7 OEBA OEAB 15 9 10 14
EN1 EN2 EN3 EN4 C5 C6 2, 3, 6 1, 4, 5 8 7 6 5 4 3 2 1
16 17 18 19 20 21
8
7
6
5
4
3
2
1
22 23
SA00306
SA00307
FUNCTION TABLE for Register An or Bn
INPUTS An or Bn X L H CPXX X CEXX H L L INTERNAL Q NC L H OPERATING MODE Hold data Load data
FUNCTION TABLE for Output Enable
INPUTS OEXX H L L INTERNAL Q X L H An or Bn OUTPUTS Z H L OPERATING MODE Disable outputs Enable outputs
H = High voltage level L = Low voltage level = Low-to-High transition X = Don't care XX = AB or BA NC = No change
H = High voltage level L = Low voltage level X = Don't care XX = AB or BA Z = High impedance "off" state
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL VCC IIK VI IOK VOUT IOUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 VO < 0 output in Off or High state output in Low state VI < 0 CONDITIONS RATING 0.5 to +7.0 18 1.2 to +7.0 50 0.5 to +5.5 128 65 to 150 UNIT V mA V mA V mA °C
DC output diode current DC output voltage3
DC output current Storage temperature range
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1995 Sep 06
2
Philips Semiconductors
Product specification
Octal registered transceiver, inverting (3-State)
74ABT2953
LOGIC DIAGRAM
CEAB 11
CPAB OEAB
10 9
DETAIL A CE A0 16 D CP Q
Q
CE D CP 8 B0
A1 A2 A3 A4 A5 A6 A7
17 18 19 20 21 22 23 DETAIL A X 7
7 6 5 4 3 2 1
B1 B2 B3 B4 B5 B6 B7
CEBA
13
CPBA OEBA
14 15
SA00308
1995 Sep 06
3
Philips Semiconductors
Product specification
Octal registered transceiver, inverting (3-State)
74ABT2953
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER Min VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Low-level Input voltage High-level output current Low-level output current Input transition rise or fall rate Operating free-air temperature range 0 40 4.5 0 2.0 0.8 32 64 10 +85 LIMITS Max 5.5 VCC V V V V mA mA ns/V °C UNIT
DC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = +25°C Min VIK Input clamp voltage VCC = 4.5V; IIK = 18mA VCC = 4.5V; IOH = 3mA; VI = VIL or VIH VOH High-level output voltage VCC = 5.0V; IOH = 3mA; VI = VIL or VIH VCC = 4.5V; IOH = 32mA; VI = VIL or VIH VOL VRST II Low-level output voltage Power-up output low voltage3 Input leakage current IOFF IPU/IPD IOZH IOZL ICEX IO ICCH ICCL ICCZ ICC Additional supply current per input pin2 Quiescent supply current Control pins Data pins VCC = 4.5V; IOL = 64mA; VI = VIL or VIH VCC = 5.5V; IO = 1mA; VI = GND or VCC VCC = 5.5V; VI = GND or 5.5V VCC = 5.5V; VI = GND or 5.5V VCC = 0.0V; VO or VI 4.5V VCC = 2.1V; VO = 0.5V; VI = GND or VCC; V OE = Don't care VCC = 5.5V; VO = 2.7V; VI = VIL or VIH VCC = 5.5V; VO = 0.5V; VI = VIL or VIH VCC = 5.5V; VO = 5.5V; VI = GND or VCC VCC = 5.5V; VO = 2.5V VCC = 5.5V; Outputs High, VI = GND or VCC VCC = 5.5V; Outputs Low, VI = GND or VCC VCC = 5.5V; Outputs 3-State; VI = GND or VCC VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND 50 2.5 3.0 2.0 Typ 0.9 3.2 3.7 2.3 0.42 0.13 ±0.01 ±5 ±5.0 ±5.0 5.0 5.0 5.0 65 110 20 110 0.3 0.55 0.55 ±1.0 ±100 ±100 ±50 50 50 50 180 250 30 250 1.5 50 Max 1.2 2.5 3.0 2.0 0.55 0.55 ±1.0 ±100 ±100 ±50 50 50 50 180 250 30 250 1.5 Tamb = 40°C to +85°C Min Max 1.2 V V V V V V µA µA µA µA µA µA µA mA µA mA µA mA UNIT
Power-off leakage current Power-up/down 3-State output current4 3-State output High current 3-State output Low current Output High leakage current Output current1
NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 4. This parameter is valid for any VCC between 0V and 2.1V, with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a transition time of up to 100µsec is permitted.
1995 Sep 06
4
Philips Semiconductors
Product specification
Octal registered transceiver, inverting (3-State)
74ABT2953
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500 LIMITS SYMBOL PARAMETER WAVEFORM Min fMAX tPLH tPHL tPZH tPZL tPHZ tPLZ Maximum clock frequency Propagation delay CPBA to An, CPAB to Bn Output enable time OEBA to An, OEAB to Bn Output disable time OEBA to An, OEAB to Bn 1 1 3 4 3 4 150 2.0 2.5 1.0 2.2 2.0 1.5 Tamb = +25°C VCC = +5.0V Typ 200 5.1 5.7 4.0 5.3 6.1 5.6 6.6 7.2 4.8 6.2 7.6 7.1 Max Tamb = 40°C to +85°C VCC = +5.0V ±0.5V Min 150 2.0 2.5 1.0 2.2 2.0 1.5 7.6 8.2 5.8 7.5 8.1 7.6 Max MHz ns ns ns UNIT
AC SETUP REQUIREMENTS
LIMITS SYMBOL PARAMETER WAVEFORM Tamb = +25°C VCC = +5.0V Min tS(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) tw(H) tw(L) Setup time An to CPAB or Bn to CPBA Hold time An to CPAB or Bn to CPBA Setup time CEAB to CPAB, CEBA to CPBA Hold time CEAB to CPAB, CEBA to CPBA CPAB or CPBA pulse width, High or Low 2 2 2 2 1 4.0 3.0 0.0 0.0 3.5 2.5 0.0 0.0 3.0 3.5 Typ 2.5 1.1 1.0 2.0 2.0 0.9 0.5 1.0 2.0 1.1 Tamb = 40°C to +85°C VCC = +5.0V ±0.5V Min 4.0 3.0 0.0 0.0 3.5 2.5 0.0 0.0 3.0 3.5 ns ns ns ns ns UNIT
AC WAVEFORMS
1/fMAX CPBA or CPAB
VM tw(H) tPHL
VM tw(L)
VM
An, Bn CEAB, CEBA
tPLH VM VM
CPAB, CPBA
An or Bn
SA00087
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency
OEAB, OEBA
VM tPZH
VM tPHZ VOH 0.3V 0V
OEAB, OEBA
An, Bn
VM
An, Bn
SA00310
Waveform 3. 3-State Output Enable Time to High Level and Output Disable Time from High Level 1995 Sep 06 5
Waveform 4. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level
ÉÉÉÉÉÉÉÉÉ ÉÉÉ É ÉÉÉÉÉÉÉÉÉ ÉÉÉ É ÉÉÉÉÉÉÉÉÉ ÉÉÉ É
VM VM VM VM ts(H) th(H) ts(L) th(L) VM VM
VM = 1.5V, VIN = GND to 3.0V
SA00309
Waveform 2. Data Setup and Hold Times
VM tPZL
VM tPLZ
VM
VOL +0.3V 0V
SA00311
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