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Part: 74ABT648N
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Description: 74ABT648; Octal Transceiver/register, Inverting (3-State);; Package: SOT137-1 (SO24), SOT355-1 (TSSOP24)
Company: Philips Semiconductors
Datasheet: Download 74ABT648N datasheet File size : 294 kB
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INTEGRATED CIRCUITS
74ABT648 Octal transceiver/register, inverting (3-State)
Product data Supersedes data of 1998 Jun 08 2002 Dec 13
Philips Semiconductors
Philips Semiconductors
Product data
Octal bus transceiver/register, inverting (3-State)
74ABT648
FEATURES
· Combines 74ABT245 and 74ABT374 type functions in one device · Independent registers for A and B buses · Multiplexed real-time and stored data · Output capability: +64 mA / 32 mA · Power-up 3-state · Power-up reset · Live insertion/extraction permitted · Latch-up protection exceeds 500 mA per Jedec Std 17 · ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
The 74ABT648 transceiver/register consists of bus transceiver circuits with inverting 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes HIGH. Output Enable (OE) and DIR pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register or both. The Select (SAB, SBA) pins determine whether data is stored or transferred through the device in real-time. The DIR determines which bus will receive data when the OE is active (LOW). In the isolation mode (OE = HIGH), data from Bus A may be stored in the B register and/or data from Bus B may be stored in the A register. Outputs from real-time, or stored registers will be inverted. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B may be driven at a time. The examples on the next page demonstrate the four fundamental bus management functions that can be performed with the 74ABT648.
DESCRIPTION
The 74ABT648 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
QUICK REFERENCE DATA
SYMBOL tPLH tPHL CIN CI/O ICCZ PARAMETER Propagation delay An to Bn or Bn to An Input capacitance CP, S, OE, DIR I/O capacitance Total supply current CONDITIONS Tamb = 25 °C; GND = 0 V CL = 50 pF; VCC = 5 V VI = 0 V or VCC Outputs disabled; VO = 0 V or VCC Outputs disabled; VCC =5.5 V TYPICAL 5.9 4 7 110 UNIT ns pF pF µA
ORDERING INFORMATION
PACKAGES 24-Pin plastic SO 24-Pin Plastic TSSOP Type I TEMPERATURE RANGE 40 °C to +85 °C 40 °C to +85 °C PART NUMBER 74ABT648D 74ABT648PW DWG NUMBER SOT137-1 SOT355-1
PIN CONFIGURATION
CPAB SAB DIR A0 A1 A2 A3 A4 A5 A6 A7 GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC CPBA SBA OE B0 B1 B2 B3 B4 B5 B6 B7
PIN DESCRIPTION
PIN NUMBER 1, 23 2, 22 3 4, 5, 6, 7, 8, 9, 10, 11 20, 19, 18, 17, 16, 15, 14, 13 21 12 24 SYMBOL CPAB / CPBA SAB / SBA DIR A0 A7 B0 B7 OE GND VCC FUNCTION A to B clock input / B to A clock input A to B select input / B to A select input Direction control input Data inputs/outputs (A side) Data inputs/outputs (B side) Output enable input (active-LOW) Ground (0 V) Positive supply voltage
SA00082
2002 Dec 13
2
Philips Semiconductors
Product data
Octal bus transceiver/register, inverting (3-State)
74ABT648
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
21 4 5 6 7 8 9 10 11 3 22 A0 A1 A2 A3 A4 A5 A6 A7 2 23 1 G3 3EN1 [BA] 3EN2 [AB] G6 G7 C4 C5
1 2 3 23 22 21
CPAB SAB DIR CPBA SBA OE
4
1 1
6 61
4D
20
5D B0 B1 B2 B3 B4 B5 B6 B7 5 20 19 18 17 16 15 14 13 6 7 8 9 10 11 1
7 7
1
2 19 18 17 16 15 14 13
SA00083
SA00156
REAL TIME BUS TRANSFER BUS B TO BUS A
REAL TIME BUS TRANSFER BUS A TO BUS B
STORAGE FROM A, B, OR A AND B
TRANSFER STORED DATA TO A OR B
OE L
DIR CPAB CPBA SAB SBA L X X X L
}
OE L H
DIR CPAB CPBA SAB SBA X X L X
}
OE L L H H X X
DIR CPAB CPBA SAB SBA X X L X X X X X
}
OE L L L H
DIR CPAB CPBA SAB SBA H H or L H or L X X H H X
}
SA00177
2002 Dec 13
3
Philips Semiconductors
Product data
Octal bus transceiver/register, inverting (3-State)
74ABT648
FUNCTION TABLE
INPUTS OE X X H H L L L L H L X * = = = = DIR X X X X L L CPAB X H or L X X CPBA X H or L X H or L SAB X X X X X X SBA X X X X L H An Input Unspecified output* Input Output DATA I/O Bn Unspecified output* Input Input Input Store A, B unspecified Store B, A unspecified Store A and B data Isolation, hold storage Real time B data to A bus Stored B data to A bus OPERATING MODE
H X X L X Real time A data to B bus Input Output H H or L X H X Stored A data to B bus HIGH voltage level LOW voltage level Don't care LOW-to-HIGH clock transition The data output function may be enabled or disabled by various signals at the OE input. Data input functions are always enabled, i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the clock.
LOGIC DIAGRAM
OE 21
DIR CPBA SBA CPAB SAB
3 23 22 1 2
1of 8 Channels
1D C1 Q
A0
4 1D C1 Q
20
B0
A1 A2 A3 A4 A5 A6 A7
5 6 7 8 9 10 11 DETAIL A X 7
19 18 17 16 15 14 13
B1 B2 B3 B4 B5 B6 B7
SA00081
2002 Dec 13
4
Philips Semiconductors
Product data
Octal bus transceiver/register, inverting (3-State)
74ABT648
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL VCC IIK VI IOK VOUT IOUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 VO < 0 V output in Off or HIGH state output in LOW state VI < 0 V CONDITIONS RATING 0.5 to +7.0 18 1.2 to +7.0 50 0.5 to +5.5 128 65 to 150 UNIT V mA V mA V mA °C
DC output diode current DC output voltage3
DC output current Storage temperature range
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 °C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER Min VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage HIGH-level input voltage LOW-level Input voltage HIGH-level output current LOW-level output current Input transition rise or fall rate Operating free-air temperature range 0 40 4.5 0 2.0 0.8 32 64 10 +85 LIMITS Max 5.5 VCC V V V V mA mA ns/V °C UNIT
2002 Dec 13
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