|
|
Part: 74AHCT125D
Category:
Logic
-> Buffers/Drivers
Description: 74AHC125; 74AHCT125; Quad Buffer/line Driver; 3-state;; Package: SOT108-1 (SO14), SOT402-1 (TSSOP14)
Company: Philips Semiconductors
Datasheet: Download 74AHCT125D datasheet File size : 67 kB
Request For quote: Find where to buy 74AHCT125D
Datasheet text preview:
INTEGRATED CIRCUITS
DATA SHEET
74AHC125; 74AHCT125 Quad buffer/line driver; 3-state
Product specification Supersedes data of 1999 Jan 11 File under Integrated Circuits, IC06 1999 Sep 27
Philips Semiconductors
Product specification
Quad buffer/line driver; 3-state
FEATURES · ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1 000 V · Balanced propagation delays · All inputs have Schmitt-trigger actions · Inputs accepts voltages higher than VCC · For AHC only: operates with CMOS input levels · For AHCT only: operates with TTL input levels · Specified from -40 to +85 and +125 °C. DESCRIPTION The 74AHC/AHCT125 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT125 are four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH at n causes the outputs to assume a HIGH-impedance OFF-state. The `125' is identical to the `126' but has active LOW enable inputs.
74AHC125; 74AHCT125
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf 3.0 ns. TYPICAL SYMBOL tPHL/tPLH CI CO CPD PARAMETER propagation delay nA to nY input capacitance output capacitance power dissipation capacitance CL = 50 pF; f = 1 MHz; notes 1 and 2 CONDITIONS AHC CL = 15 pF; VCC = 5 V VI = VCC or GND 3.0 3.0 4.0 10 AHCT 3.0 3.0 4.0 12 ns pF pF pF UNIT
Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; (CL × VCC2 × fo) = sum of outputs; CL = output load capacitance in pF; VCC = supply voltage in Volts. 2. The condition is VI = GND to VCC. FUNCTION TABLE See note 1. INPUT nOE L L H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don't care; Z = high-impedance OFF-state. nA L H X OUTPUT nY L H Z
1999 Sep 27
2
Philips Semiconductors
Product specification
Quad buffer/line driver; 3-state
ORDERING INFORMATION OUTSIDE NORTH AMERICA 74AHC125D 74AHC125PW 74AHCT125D 74AHCT125PW PINNING PIN 1, 4, 10 and 13 2, 5, 9 and 12 3, 6, 8 and 11 7 14 SYMBOL 1OE to 4OE 1A to 4A 1Y to 4A GND VCC data inputs data outputs ground (0 V) DC supply voltage
74AHC125; 74AHCT125
PACKAGES NORTH AMERICA PINS 74AHC125D 74AHC125PW DH 74AHCT125D 7AHCT125PW DH 14 14 14 14 PACKAGE SO TSSOP SO TSSOP MATERIAL plastic plastic plastic plastic CODE SOT108-1 SOT402-1 SOT108-1 SOT402-1
DESCRIPTION output enable inputs (active LOW)
1999 Sep 27
3
Philips Semiconductors
Product specification
Quad buffer/line driver; 3-state
74AHC125; 74AHCT125
1OE 1A 1Y 2OE 2A 2Y GND
1 2 3 4 5 6 7
MNA226
14 VCC 13 4OE 12 4A
handbook, halfpage
nA
nY
125
11 4Y 10 3OE nOE 9 3A
MNA227
8 3Y
Fig.1 Pin configuration.
Fig.2 Logic diagram.
handbook, halfpage
2 1 5 4 9 10 12 13
1A 1OE 2A 2OE 3A 3OE 4A 4OE
1Y
3
handbook, halfpage
2 1 EN1
1
3
2Y
6
5 6 4
3Y
8
9 8 10
4Y
11
12 11 13
MNA229
MNA228
Fig.3 Functional diagram.
Fig.4 IEC logic symbol.
1999 Sep 27
4
Philips Semiconductors
Product specification
Quad buffer/line driver; 3-state
RECOMMENDED OPERATING CONDITIONS
74AHC125; 74AHCT125
74AHC SYMBOL VCC VI VO Tamb PARAMETER DC supply voltage input voltage output voltage operating ambient temperature range see DC and AC characteristics per device VCC = 5 V ±0.5 V CONDITIONS MIN. 2.0 0 0 -40 -40 TYP. MAX. MIN. 5.0 - - +25 +25 - - 5.5 5.5 VCC +85 4.5 0 0 -40
74AHCT UNIT TYP. MAX. 5.0 - - +25 +25 - - 5.5 5.5 VCC +85 V V V °C
+125 -40 100 20 - -
+125 °C - 20 ns/V
tr,tf (t/f) input rise and fall rates
VCC = 3.3 V ±0.3 V - -
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC VI IIK IOK IO ICC Tstg PD Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. For SO packages: above 70 °C the value of PD derates linearly with 8 mW/K. For TSSOP packages: above 60 °C the value of PD derates linearly with 5.5 mW/K. PARAMETER DC supply voltage input voltage range DC input diode current DC output diode current DC VCC or GND current storage temperature range power dissipation per package for temperature range: -40 to +125 °C; note 2 VI VCC + 0.5 V; note 1 CONDITIONS MIN. MAX. UNIT -0.5 -0.5 - - - - -65 - +7.0 +7.0 -20 ±20 ±25 ±75 500 V V mA mA mA mA mW
DC output source or sink current -0.5 V < VO < VCC + 0.5 V
+150 °C
1999 Sep 27
5
Others parts begin by 74
74-1 74-2 74-3 74-4 74-5 74-6 74-7 74-8 74-9 74-10 74-11 74-12 74-13 74-14 74-15 74-16 74-17 74-18 74-19 74-20 74-21 74-22 74-23 74-24 74-25 74-26 74-27 74-28 74-29 74-30 74-31 74-32 74-33 74-34 74-35 74-36 74-37 74-38 74-39 74-40 74-41 74-42 74-43 74-44 74-45 74-46 74-47 74-48 74-49 74-50 74-51 74-52 74-53 74-54 74-55 74-56 74-57 74-58 74-59 74-60 74-61 74-62
|
|
|
