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Details, datasheet, quote on part number:74AHCT1G02
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Datasheet text preview:
INTEGRATED CIRCUITS
DATA SHEET
74AHC1G02; 74AHCT1G02 2-input NOR gate
Product specification Supersedes data of 2002 Feb 15 2002 May 27
Philips Semiconductors
Product specification
2-input NOR gate
FEATURES · Symmetrical output impedance · High noise immunity · ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V. · Low power dissipation · Balanced propagation delays · Very small 5-pin package · Output capability: standard · Specified from -40 to +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf 3.0 ns.
74AHC1G02; 74AHCT1G02
DESCRIPTION The 74AHC1G/AHCT1G02 is a high-speed Si-gate CMOS device. The 74AHC1G/AHCT1G02 provides the 2-input NOR function.
TYPICAL SYMBOL tPHL/tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts. 2. The condition is VI = GND to VCC. PARAMETER propagation delay A and B to Y input capacitance power dissipation capacitance CL = 50 pF; f = 1 MHz; notes 1 and 2 CONDITIONS AHC1G CL = 15 pF; VCC = 5 V 3.2 1.5 18 AHCT1G 3.5 1.5 19 ns pF pF UNIT
2002 May 27
2
Philips Semiconductors
Product specification
2-input NOR gate
FUNCTION TABLE See note 1. INPUTS A L L H H Note 1. H = HIGH voltage level; L = LOW voltage level. ORDERING AND PACKAGE INFORMATION B L H L H
74AHC1G02; 74AHCT1G02
OUTPUT Y H L L L
PACKAGES TYPE NUMBER 74AHC1G02GW 74AHCT1G02GW 74AHC1G02GV 74AHCT1G02GV PINNING PIN 1 2 3 4 5 B A GND Y VCC SYMBOL data input B data input A ground (0 V) data output Y supply voltage DESCRIPTION TEMPERATURE RANGE -40 to +125 °C -40 to +125 °C -40 to +125 °C -40 to +125 °C 5 5 5 5 PINS PACKAGE SC-88A SC-88A SC-74A SC-74A MATERIAL plastic plastic plastic plastic CODE SOT353 SOT353 SOT753 SOT753 MARKING AB CB A02 C02
handbook, halfpage
B1 A2 GND 3
MNA102
5 VCC
handbook, halfpage
1 2
B A
02
4 Y
Y
4
MNA103
Fig.1 Pin configuration.
Fig.2 Logic symbol.
2002 May 27
3
Philips Semiconductors
Product specification
2-input NOR gate
74AHC1G02; 74AHCT1G02
handbook, halfpage
1 2
1
MNA104
handbook, halfpage
B Y A
MNA105
4
Fig.3 IEC logic symbol.
Fig.4 Logic diagram.
RECOMMENDED OPERATING CONDITIONS 74AHC1G SYMBOL VCC VI VO Tamb PARAMETER supply voltage input voltage output voltage operating ambient temperature input rise and fall times see DC and AC characteristics per device VCC = 3.3 ±0.3 V VCC = 5 ±0.5 V CONDITIONS MIN. 2.0 0 0 -40 TYP. 5.0 - - +25 MAX. 5.5 5.5 VCC +125 MIN. 4.5 0 0 -40 TYP. 5.0 - - +25 MAX. 5.5 5.5 VCC +125 V V V °C 74AHCT1G UNIT
tr, tf (t/f)
- -
- -
100 20
- -
- -
- 20
ns/V ns/V
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC VI IIK IOK IO ICC Tstg PD Note 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. PARAMETER supply voltage input voltage input diode current output diode current output source or sink current VCC or GND current storage temperature power dissipation per package for temperature range from -40 to +125 °C VI VCC + 0.5 V; note 1 -0.5 V < VO < VCC + 0.5 V CONDITIONS MIN. -0.5 -0.5 - - - - -65 - MAX. +7.0 +7.0 -20 ±20 ±25 ±75 +150 250 UNIT V V mA mA mA mA °C mW
2002 May 27
4
Philips Semiconductors
Product specification
2-input NOR gate
DC CHARACTERISTICS
74AHC1G02; 74AHCT1G02
Family 74AHC1G At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER VIH HIGH-level input voltage VCC (V) 2.0 3.0 5.5 VIL LOW-level input voltage 2.0 3.0 5.5 VOH HIGH-level output voltage VI = VIH or VIL; IO = -50 µA VI = VIH or VIL; IO = -50 µA VI = VIH or VIL; IO = -50 µA VI = VIH or VIL; IO = -4.0 mA VI = VIH or VIL; IO = -8.0 mA VOL LOW-level output voltage VI = VIH or VIL; IO = 50 µA VI = VIH or VIL; IO = 50 µA VI = VIH or VIL; IO = 50 µA VI = VIH or VIL; IO = 4.0 mA VI = VIH or VIL; IO = 8.0 mA ILI ICC CI input leakage current quiescent supply current input capacitance VI = VCC or GND VI = VCC or GND; IO = 0 2.0 3.0 4.5 3.0 4.5 2.0 3.0 4.5 3.0 4.5 5.5 5.5 25 MIN. 1.5 2.1 3.85 - - - 1.9 2.9 4.4 2.58 3.94 - - - - - - - - - - - - - - 2.0 3.0 4.5 - - 0 0 0 - - - - 1.5 - - - 0.5 0.9 1.65 - - - - - 0.1 0.1 0.1 0.36 0.36 0.1 1.0 10 Tamb (°C) -40 to +85 - - - 0.5 0.9 1.65 - - - - - 0.1 0.1 0.1 0.44 0.44 1.0 10 10 -40 to +125 - - - 0.5 0.9 1.65 - - - - - 0.1 0.1 0.1 0.55 0.55 2.0 40 10 UNIT
TYP. MAX. MIN. MAX. MIN. MAX. 1.5 2.1 3.85 - - - 1.9 2.9 4.4 2.48 3.8 - - - - - - - - 1.5 2.1 3.85 - - - 1.9 2.9 4.4 2.40 3.70 - - - - - - - - V V V V V V V V V V V V V V V V µA µA pF
2002 May 27
5
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