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Part: 74ALS241A

Category:
 Logic
   -> Bus Interface
             -> Bus Oriented Circuits

Description: 74ALS241A/74ALS241A 1; Octal Buffer (3-state)

Company: Philips Semiconductors

Datasheet: Download 74ALS241A datasheet     File size : 67 kB

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INTEGRATED CIRCUITS

74ALS241A/74ALS241A­1 Octal buffer (3­state)
Product specification IC05 Data Handbook 1991 Feb 08

Philips Semiconductors

Philips Semiconductors

Product specification

Octal buffer (3-State)

74ALS241A/74ALS241A-1

FEATURES

· Octal bus interface · 3-State buffer outputs sink 24mA and source 15mA · The -1 version sinks 48 mA
DESCRIPTION
The 74ALS241A is an octal buffer that is ideal for driving bus lines or buffer memory address registers. The outputs are all capable of sinking 24mA and sourcing up to 15mA, producing very good capacitive drive characteristics. The device features two output enables, OEa and OEb, each controlling four of the 3-State outputs. The 74ALS241A-1 sinks 48mA IOL if the VCC is limited to 5.0V ±0.25V. TYPICAL PROPAGATION DELAY 4.5ns 4.5ns TYPICAL SUPPLY CURRENT (TOTAL) 18mA 18mA

PIN CONFIGURATION
OEa Ia0 Yb0 Ia1 Yb1 Ia2 Yb2 Ia3 Yb3 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC OEb Ya0 Ib0 Ya1 Ib1 Ya2 Ib2 Ya3 Ib3

SF00324

ORDERING INFORMATION
ORDER CODE DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C 74ALS241AN, 74ALS241A-1N 74ALS241AD, 74ALS241A-1D 74ALS241ADB, 74ALS241A-1DB DRAWING NUMBER

TYPE 74ALS241A 74ALS241A-1

20-pin plastic DIP 20-pin plastic SOL 20-pin plastic SSOP Type II

SOT146-1 SOT163-1 SOT339-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS Ian, Ibn OEa, OEb Yan, Ybn Yan, Ybn Data inputs Output Enable inputs (active-Low) Data outputs Data outputs (-1 version) DESCRIPTION 74ALS (U.L.) HIGH/LOW 1.0/1.0 1.0/1.0 750/240 750/480 LOAD VALUE HIGH/LOW 20µA/0.1mA 20µA/0.1mA 15mA/24mA 15mA/48mA

NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.

LOGIC SYMBOL
2 4 6 8 17 15 13 11

IEC/IEEE SYMBOL
1 19 EN1 EN2 18 16 14 12 2 3 5 7 9

Ia0 1 19 OEa OEb

Ia1 Ia2

Ia3 Ib0

Ib1 Ib2

Ib3

2 4 6 8

2D

1

Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3

17 15

18 VCC = Pin 20 GND = Pin 10

16

14

12

3

5

7

9

13 11

SF00325

SF00326

1991 Feb 08

2

853­1276 01670

Philips Semiconductors

Product specification

Octal buffer (3-State)

74ALS241A/74ALS241A-1

LOGIC DIAGRAM
Ia0 2 18 Ya0 Ib0 17 3 Yb0

FUNCTION TABLE
INPUTS OEa L
Yb1

OUTPUTS Ib L H X Ya L H Z Yb L H Z

Ia L H X

OEb H H L

Ia1

4

16

Ya1

Ib1

15

5

L
Ia2 6 14 Ya2 Ib2 13 7 Yb2

H H L X Z = = = =

Ia3

8

12

Ya3

Ib3

11

9

Yb3

OEa

1

OEb

10

High voltage level Low voltage level Don't care High impedance "off" state

VCC = Pin 20 GND = Pin 10

SF00327

ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state All versions Current applied to output in Low output state applied to output in Low output state Operating free-air temperature range Storage temperature range -1 version PARAMETER RATING ­0.5 to +7.0 ­0.5 to +7.0 ­30 to +5 ­0.5 to VCC 48 96 0 to +70 ­65 to +150 UNIT V V mA V mA mA °C °C

RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VIH VIL IIK IOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current All versions Low-level output current output current Operating free-air temperature range -1 version 0 PARAMETER MIN 4.5 2.0 0.8 ­18 ­15 24 48
1

LIMITS NOM 5.0 MAX 5.5 UNIT V V V mA mA mA mA °C

+70

NOTE: 1. The 48mA limit applies only under the condition of VCC = 5.0V ±5%.

1991 Feb 08

3

Philips Semiconductors

Product specification

Octal buffer (3-State)

74ALS241A/74ALS241A-1

DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS1 CONDITIONS VCC±10%, VIL = MAX, , VIH = MIN VCC = MIN, VIL = MAX, VIH = MIN All versions versions VOL Low-level output voltage out voltage -1 version VIK II IIH IIL IOZH IOZL IO ICC Input clamp voltage Input current at maximum input voltage High-level input current Low-level input current Off-state output current, High-level voltage applied Off-state output current, Low-level voltage applied Output current3 ICCH Supply current (total) ICCL ICCZ VCC = MAX VCC = MIN, VIL = MAX, , , VIH = MIN VCC = 4.75V, VIL = MAX, VIH = MIN VCC = MIN, II = IIK VCC = MAX, VI = 7.0V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.4V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.4V VCC = MAX, VO = 2.25V ­30 7 21 25 IOH = ­0.4mA IOH = ­3mA IOH = ­15mA IOL = 12mA IOL = 24mA IOL = 48mA LIMITS MIN VCC ­ 2 2.4 2.0 0.25 0.35 0.35 ­0.73 0.40 0.50 0.50 ­1.5 0.1 20 ­0.1 20 ­20 ­112 15 26 30 3.2 TYP2 MAX UNIT V V V V V V V mA µA mA µA µA mA mA mA mA

VOH

High-level output voltage out voltage

NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.

AC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITION Tamb = 0°C to +70°C VCC = +5.0V ± 10% CL = 50pF, RL = 500 MIN tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation delay In to Yn Output Enable time to High or Low level Output disable time from High or Low level Waveform 1 Waveform 2 Waveform 3 Waveform 2 Waveform 3 1.5 1.5 1.0 2.5 1.0 2.5 MAX 10.0 10.0 10.0 12.0 10.0 12.0 ns ns ns UNIT

1991 Feb 08

4

Philips Semiconductors

Product specification

Octal buffer (3-State)

74ALS241A/74ALS241A-1

AC WAVEFORMS
For all waveforms, VM = 1.3V.
Ian, Ibn VM tPLH VM tPHL

Yn

VM

VM

SF00329

Waveform 1. Propagation Delay for Non-Inverting Output

OEa VM OEb tPZH Yn VM 0V tPHZ VOH -0.3V VM

OEn VM OEb tPZL Yn VM VOL +0.3V SC00093 tPLZ 3.5V VM

SC00092

Waveform 2. 3-State Output Enable Time to High Level and Output Disable Time from High Level

Waveform 3. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level

TEST CIRCUIT AND WAVEFORMS
V CC 7.0V NEGATIVE PULSE 90% VM 10% tTHL (tff) CL RL tw VM 10% tTLH (tr ) 0.3V 90% AMP (V)

V IN PULSE GENERATOR RT D.U.T.

VOUT

RL

tTLH (tr ) 90%

tTHL (tf ) AMP (V) 90% VM tw 10% 0.3V

Test Circuit for 3-State Outputs SWITCH POSITION TEST SWITCH closed tPLZ, tPZL All other open

POSITIVE PULSE 10%

VM

Input Pulse Definition INPUT PULSE REQUIREMENTS Family Amplitude VM 74ALS 3.5V 1.3V Rep.Rate 1MHz tw 500ns tTLH 2.0ns tT H L 2.0ns

DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators.

SC00072

1991 Feb 08

5




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