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Part: 74F153
Category:
Logic
-> Multiplexers/Demultiplexers
-> Multiplexers
Description: 74F153; Dual 4-line to 1-line Multiplexer;; Package: SOT109 (SO16), SOT38-4 (DIP16)
Company: Philips Semiconductors
Datasheet: Download 74F153 datasheet File size : 93 kB
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INTEGRATED CIRCUITS
74F153 Dual 4-line to 1-line multiplexer
Product specification IC15 Data Handbook 1996 Jan 05
Philips Semiconductors
Philips Semiconductors
Product specification
Dual 4-line to 1-line multiplexer
74F153
FEATURES
· Non-inverting outputs · Separate enable for each section · Common select inputs · See 74F253 for 3-State version
DESCRIPTION
The 74F153 is a dual 4-input multiplexer that can select 2 bits of data from up to four sources selected by common Select inputs (S0, S1). The two 4-input multiplexer circuits have individual active-Low Enables (Ea, Eb) which can be used to strobe the outputs independently. Outputs (Ya, Yb) are forced Low when the corresponding Enables (Ea, Eb) are High. The 74F153 is the logic implementation of a 2-pole, 4-position switch where the switch is determined by the logic levels supplied to the common select inputs. TYPICAL PROPAGATION DELAY 7.0ns TYPICAL SUPPLY CURRENT (TOTAL) 12mA
PIN CONFIGURATION
Ea S1 I3a I2a I1a I0a Ya GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC Eb S0 I3b I2b I1b I0b Yb
SF00146
ORDERING INFORMATION
DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F153N N74F153D PKG. DWG. # SOT38-4 SOT109-1
TYPE 74F153
16-pin plastic DIP 16-pin plastic SO
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS I0a I3a I0b I3b S0, S1 Ea Eb Ya, Yb DESCRIPTION Port A data inputs Port B data inputs Common Select inputs Port A Enable input (active Low) Port B Enable input (active Low) Port A, B data outputs 74F (U.L.) HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 50/33 LOAD VALUE HIGH/LOW 20µA/0.6mA 20µA/0.6mA 20µA/0.6mA 20µA/0.6mA 20µA/0.6mA 1.0µA/20mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
6 5 4 3 10 11 12 13
IEC/IEEE SYMBOL
14 2 0 G 1 0 3
I0a 14 2 1 15 S0 S1 Ea Eb
I1a
I2a
I3a
I0b
I1b
I2b
I3b
1 6 5 4 3 15
EN 0 1 2 3
MUX 7
Ya
Yb
10 11 12 13 9
7 VCC = Pin 16 GND = Pin 8
9
SF00147
SF00148
1996 Jan 05
2
8530100 16187
Philips Semiconductors
Product specification
Dual 4-line to 1-line multiplexer
74F153
LOGIC DIAGRAM
Ea 1 I0a 6 I1a 5 I2a 4 I3a 3 S1 2 S2 14 I0b 10 I0b I2b I3b 11 12 13 Eb 15
7 VCC = Pin 16 GND = Pin 8 Ya Yb
9
SF00149A
FUNCTION TABLE
INPUTS S0 X L L H H L L H H H = High voltage level L = Low voltage level X = Don't care S1 X L L L L H H H H En H L L L L L L L L I0n X L H X X X X X X I1n X X X L H X X X X I2n X X X X X L H X X I3n X X X X X X X L H OUTPUT Yn L L H L H L H L H
1996 Jan 05
3
Philips Semiconductors
Product specification
Dual 4-line to 1-line multiplexer
74F153
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Current applied to output in Low output state Operating free-air temperature range Storage temperature range PARAMETER RATING 0.5 to +7.0 0.5 to +7.0 30 to +5 0.5 to VCC 40 0 to +70 65 to +150 UNIT V V mA V mA °C °C
RECOMMENDED OPERATING CONDITIONS
LIMITS SYMBOL VCC VIH VIL IIK IOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current Operating free-air temperature range 0 PARAMETER MIN 4.5 2.0 0.8 18 1 20 +70 NOM 5.0 MAX 5.5 V V V mA mA mA °C UNIT
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS1 CONDITIONS VCC = MIN, VIL = MAX VIH = MIN, IOH = MAX Low-level output voltage output voltage Input clamp voltage Input current at maximum input voltage High-level input current Low-level input current Short-circuit output current3 ) Supply current ( (total) ICCH ICCL VCC = MIN, VIL = MAX VIH = MIN, IOL = MAX VCC = MIN, II = IIK VCC = MAX, VI = 7.0V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.5V VCC = MAX VCC = MAX En = GND, Sn=In=4.5V En=Sn=In=GND 60 12 12 ±10%VCC ±5%VCC ±10%VCC ±5%VCC LIMITS MIN 2.5 V 2.7 3.4 0.30 0.30 0.73 0.50 V 0.50 1.2 100 20 0.6 150 20 20 V µA µA mA mA mA mA TYP2 MAX UNIT
VOH
High-level output voltage output voltage
VOL VIK II IIH IIL IOS ICC
NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last.
1996 Jan 05
4
Philips Semiconductors
Product specification
Dual 4-line to 1-line multiplexer
74F153
AC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITION VCC = +5.0V Tamb = +25°C CL = 50pF, RL = 500 MIN tPLH tPHL tPLH tPHL tPLH tPHL Propagation delay In to Yn Propagation delay Sn to Yn Propagation delay En to Yn Waveform 1 Waveform 2 Waveform 2 3.0 3.0 5.0 5.0 5.0 4.0 TYP 4.5 5.0 8.0 8.0 7.5 5.5 MAX 7.0 7.5 10.5 10.5 9.0 7.0 VCC = +5.0V ± 10% Tamb = 0°C to +70°C CL = 50pF, RL = 500 MIN 2.5 2.5 4.5 4.5 4.5 3.5 MAX 8.0 8.0 12.0 12.0 10.5 8.0 ns ns ns UNIT
AC WAVEFORMS
For all waveforms, VM = 1.5V.
In Sn VM tPHL En tPHL tPLH VM VM
VM tPLH
Yn
VM
VM
Yn
VM
VM
SF00150
SF00151
Waveform 1. Propagation Delay, Data to Output
Waveform 2. Propagation Delay, Enable and Select to Output
TEST CIRCUIT AND WAVEFORMS
V CC NEGATIVE PULSE V IN PULSE GENERATOR RT D.U.T. VOUT 90% VM 10% tTHL (tf ) CL RL tw VM 10% tTLH (tr ) 0V 90% AMP (V)
tTLH (tr ) 90% POSITIVE PULSE VM 10% tw
tTHL (tf ) AMP (V) 90% VM 10% 0V
Test Circuit for Totem-Pole Outputs DEFINITIONS: RL = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tT H L 2.5ns
SF00006
1996 Jan 05
5
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