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Part: 74F583

Category:
 Logic
   -> Arithmetic Functions
             -> Adders->Full adders

Description: 74F583; 4-bit BCD Adder;; Package: SOT162-1 (SO16), SOT38-1 (DIP16)

Company: Philips Semiconductors

Datasheet: Download 74F583 datasheet     File size : 202 kB

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Datasheet text preview:
INTEGRATED CIRCUITS

74F583 4-bit BCD adder
Product specification IC15 Data Handbook 1989 Apr 06

Philips Semiconductors

Philips Semiconductors

Product specification

4-bit BCD adder

74F583

FEATURES

· Adds two decimal numbers · Full internal look-ahead · Fast ripple carry for economical expansion · Sum output delay 19.5 ns max. · Ripple carry delay 8.5 ns max. · Input to ripple delay 13.0 ns max. · Supply current 60 mA max.
DESCRIPTION
The 74F583 4-bit coded (BCD) full adder performs the addition of two decimal numbers (A0­A3, B0­B3). The look-ahead generates BCD carry terms internally, allowing the 74F583 to then do BCD addition correctly. For BCD numbers 0 through 9 at A and B inputs, the BCD sum forms at the output. In addition of two BCD numbers totalling a number greater than 9, a valid BCD number and carry will result. For input values larger than 9, the number is converted from binary to BCD. Binary to BCD conversion occurs by grounding one set of inputs, An or Bn, and applying a 4-bit binary number to the other set of inputs. If the input is between 0 and 9, a BCD number occurs at the output. If the binary input falls between 10 and 15, a carry term is generated. Both the carry term and the sum are the BCD equivalent of the binary input. Converting binary numbers greater than 16 may be achieved by cascading 74F583s.

PIN CONFIGURATION
B1 1 B2 B3 A3 Cn Cn+4 S2 GND 2 3 4 5 6 7 8 16 VCC 15 A2 14 A1 13 A0 12 B0 11 S0 10 S1 9 S3

SF01436

TYPE 74F583

TYPICAL PROPAGATION DELAY 9.0 ns

TYPICAL SUPPLY CURRENT (TOTAL) 45 mA

ORDERING INFORMATION
PACKAGE 16-pin plastic DIP 16-pin plastic SO COMMERCIAL RANGE VCC = 5 V ±10% Tamb = 0°C to +70°C N74F583N N74F583D DRAWING NUMBER SOT38-4 SOT109-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS A0­A3 B0­B3 Cn Cn+4 S0­S3 A operand inputs B operand inputs Carry input Carry output Sum outputs DESCRIPTION 74F (U.L.) HIGH / LOW 1.0 / 2.0 1.0 / 2.0 1.0 / 1.0 50 / 33 50 / 33 LOAD VALUE HIGH / LOW 20 µA / 1.2 mA 20 µA / 1.2 mA 20 µA / 0.6 mA 1.0 mA / 20 mA 1.0 mA / 20 mA

NOTE: One (1.0) FAST Unit Load is defined as 20 µA in the High state and 0.6 mA in the Low state.

LOGIC SYMBOL
13 12 14 1 15 2 4 3

LOGIC SYMBOL (IEEE/IEC)
13 14

(BCD)
0 P 3 0 Q 3 CI CO 6 0 11 10

A0 B0 A1 B1 A2 B2 A3 B3

15 4

5

Cn S0 S1 S2 S3

Cn+4

6

12 1 2 3


3

7 9

11 VCC = Pin 16 GND = Pin 8

10

7

9

5

SF01437

SF01438

1989 Apr 06

2

853­1245 96263

Philips Semiconductors

Product specification

4-bit BCD adder

74F583

LOGIC DIAGRAM
11 S0

12 B0

A0

13

10

S1

B1

1

A1

14

B2

2

A2

15 7

S2

B3

3

A3

4

9

S3

Cn

5 6

Cn+4

VCC = PIN 16 GND = PIN 8

SF01435

1989 Apr 06

3

Philips Semiconductors

Product specification

4-bit BCD adder

74F583

ABSOLUTE MAXIMUM RATINGS
Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range. SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Current applied to output in Low output state Operating free-air temperature range Storage temperature range PARAMETER RATING ­0.5 to +7.0 ­0.5 to +7.0 ­30 to +5 ­0.5 to +VCC 40 0 to +70 ­65 to +150 UNIT V V mA V mA °C °C

RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VIH VIL IIK IOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current Operating free-air temperature range 0 PARAMETER LIMITS MIN 4.5 2.0 0.8 ­18 ­1 20 70 NOM 5.0 MAX 5.5 UNIT V V V mA mA mA °C

DC ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature range unless otherwise noted. SYMBOL VOH VOL VIK II IIH IIL IOS ICC PARAMETER High-level output voltage output voltage Low-level output voltage output voltage Input clamp voltage Input current at maximum input voltage High-level input current Low-level input current input current Short circuit output current3 Supply current (total) Cn only An and Bn TEST CONDITIONS1 CONDITIONS VCC = MIN, VIL = MAX VIH = MIN, IOH = MAX VCC = MIN, VIL = MAX VIH = MIN, IOL = MAX VCC = MIN, II = IIK VCC = MAX, VI = 7.0 V VCC = MAX, VI = 2.7 V VCC = MAX, VI = 0.5 V VCC = MAX, VI = 0.5 V VCC = MAX VCC = MAX ­60 45 ±10% VCC ±5% VCC ±10% VCC ±5% VCC LIMITS MIN 2.5 2.7 3.4 0.30 0.30 ­0.73 0.50 0.50 ­1.2 100 20 ­0.6 ­1.2 ­150 60 TYP2 MAX UNIT V V V V V µA µA mA mA mA mA

NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5 V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last.

1989 Apr 06

4

Philips Semiconductors

Product specification

4-bit BCD adder

74F583

AC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITION Tamb = +25°C VCC = 5 V CL = 50 pF; RL = 500 MIN tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Propagation delay An or Bn to Sn Propagation delay An or Bn to Sn (INV) Propagation delay Cn to Cn+4 Propagation delay An or Bn to Cn+4 Propagation delay Cn to Sn Propagation delay Cn to Sn (INV) Waveform 1 Waveform 2 Waveform 1, 2 Waveform 1, 2 Waveform 1 Waveform 2 5.0 5.0 6.0 4.0 3.5 2.5 5.0 5.0 4.0 3.5 6.0 3.5 TYP 13.0 10.5 11.0 8.0 5.0 4.0 8.0 7.5 12.0 8.0 9.5 8.0 MAX 17.0 14.0 18.0 12.0 8.0 7.0 11.5 10.5 15.5 12.5 13.0 11.5 Tamb = 0°C to +70°C VCC = 5 V ±10% CL = 50 pF; RL = 500 MIN 5.0 5.0 5.0 4.0 3.0 2.0 4.5 4.5 3.5 3.0 5.0 3.0 MAX 18.0 15.0 19.5 12.5 8.5 7.0 13.0 11.5 17.0 13.5 14.5 12.0 ns ns ns ns ns ns UNIT

AC WAVEFORMS
For all waveforms, VM = 1.5 V.
An, Bn, Cn VM VM An, Bn, Cn VM VM

tPLH Sn, Cn+4

tPHL Sn, Cn+4

tPHL

tPLH

VM

VM

VM

VM

SF01439

SF01440

Waveform 1.

Propagation delay for non-inverting outputs

Waveform 2.

Propagation delay for inverting outputs

TEST CIRCUIT AND WAVEFORMS
V CC NEGATIVE PULSE V IN PULSE GENERATOR RT D.U.T. VOUT 90% VM 10% tTHL (tf ) CL RL tw VM 10% tTLH (tr ) 0V 90% AMP (V)

tTLH (tr ) 90% POSITIVE PULSE VM 10% tw

tTHL (tf ) AMP (V) 90% VM 10% 0V

Test Circuit for Totem-Pole Outputs DEFINITIONS: RL = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.

Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tT H L 2.5ns
SF00006

1989 Apr 06

5




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