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Part: 74F595
Category:
Logic
-> Registers
-> Shift Registers
Description: 74F595; 8-bit Shift Register With Output Latches (3-State);; Package: SOT109 (SO16), SOT38-4 (DIP16)
Company: Philips Semiconductors
Datasheet: Download 74F595 datasheet File size : 202 kB
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INTEGRATED CIRCUITS
74F595 8-bit shift register with output laches (3-State)
Product specification IC15 Data Handbook 1990 Apr 18
Philips Semiconductors
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
FEATURES
· Low noise, now switching feedthrough current · Controlled output edge rates · High impedance PNP base inputs for reduced loading
(20µA in High and Low states)
PIN CONFIGURATION
Q1 Q2 Q3 Q4 Q5 Q6 Q7 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC Q0 DS OE STCP SHCP SHR QS
· 8-bit serial-in, parallel-out shift register with storage · 3-state outputs · Shift register has direct clear · Guaranteed shift frequency-DC to 100MHz
DESCRIPTION
The 74F595 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-State outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct overriding clear, serial input and serial output pins for cascading. Both the shift register and storage register clocks are positive edge-triggered. If the user wishes to connect both clocks together, the shift register state will always be one clock pulse ahead of the storage register. This device uses patented circuitry to control system noise and internal ground bounce. This is done by eliminating switching feedthrough current and controlling both Low-to-High and High-to-Low slew rates. TYPE 74F595
SF01096
TYPICAL fMAX 130MHz
TYPICAL SUPPLY CURRENT (TOTAL) 65mA
ORDERING INFORMATION
DESCRIPTION 16-pin plastic DIP 16-pin plastic SO COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F595N N74F595D PKG DWG # SOT38-4 SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS Ds SHCP STCP SHR OE Qs Q0Q7 Serial data input Shift register clock pulse input (active rising edge) Storage register clock pulse input (active rising edge) Shift register reset input (active Low) Output Enable input (active Low) Serial expansion output Data outputs DESCRIPTION 74F (U.L.) HIGH/LOW 1.0/0.033 1.0/0.033 1.0/0.033 1.0/0.033 1.0/0.033 50/33 150/40 LOAD VALUE HIGH/LOW 20µA/20µA 20µA/20µA 20µA/20µA 20µA/20µA 20µA/20µA 1.0mA/20mA 3.0mA/24mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
1990 Apr 18
2
8531096 99392
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
LOGIC SYMBOL
14
IEC/IEEE SYMBOL (IEEE/IEC)
13 12 EN3 C2 SRG8 Ds 10 11 Qs 14 R C1/ ! 1D 2D 3 15 1
13 12 11 10
OE STCP SHCP SHR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 9
2 3
15
1
2
3
4
5
6
7
4 5
VCC = Pin 16 GND = Pin 8
6
SF01097
2D 3
7 9
SF01098
MODE SELECT FUNCTION TABLE
INPUTS OE H H L H L H L H L SHR H L L H H H H H H SHCP X X STCP Dn X X X ds ds X X ds ds INTERNAL SHIFT REGISTERS O0 O0 L0 L0 Ds Ds O0 O0 Ds Ds O1O7 O1O7 L L o0o6 o0o6 O1O7 O1O7 o0o6 o0o6 INTERNAL STORAGE REGISTER Q0Q7 Q0Q7 Q0Q7 Q0Q7 Q0Q7 Q0Q7 o0o7 o0o7 o0o7* o0o7* OUTPUTS Q0Q7 Z Z Q0Q7 Z Q0Q7 Z o0o7 Z o0o* QS Q7 L L o6 Shift o6 Q7 Store Q7 o6 Store, then Shift then Shift o6 OPERATING MODES No Change Clear shift register, hold latch
H = High voltage level L = Low voltage level X = Don't care Z = High impedance dn (on)=Lower case letters indicate the state of the referenced input (or output) one setup time prior to the Low-to-High clock transition = Low-to-High clock transition = Not a Low-to-High clock transition * = When clocking both SHCP and STCP simultaneously the Shift Register state will always be one clock pulse ahead of the Storage Register
1990 Apr 18
3
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
LOGIC DIAGRAM
13 12 11 10 14 D CP CLR Q Q R CP S Q 15 Q0
OE STCP SHCP SHR Ds
S R CP CLR
Q Q
R CP S
Q
1
Q1
S R CP CLR
Q Q
R CP S
Q
2
Q2
S R CP CLR
Q Q
R CP S
Q
3
Q3
S R CP CLR
Q Q
R CP S
Q
4
Q4
S R CP CLR
Q Q
R CP S
Q
5
Q5
S R CP CLR
Q Q
R CP S
Q
6
Q6
S R CP CLR
Q Q
R CP S
Q
7
Q7
9
Qs
VCC = Pin 16 GND = Pin 8
SF01099
1990 Apr 18
4
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Qs Current applied to output in Low output state applied to output in Low output state Q0Q7 Operating free-air temperature range Storage temperature range 48 0 to +70 65 to +150 mA °C °C PARAMETER RATING 0.5 to +7.0 0.5 to +7.0 30 to +5 0.5 to +VCC 40 UNIT V V mA V mA
RECOMMENDED OPERATING CONDITIONS
LIMITS SYMBOL VCC VIH VIL IIK IOH Supply voltage High-level input voltage Low-level input voltage Input clamp current Qs High-level output current output current Q0Q7 Qs IOL Tamb Low-level output current output current Q0Q7 Operating free-air temperature range 0 24 70 mA °C 3 20 mA mA PARAMETER MIN 4.5 2.0 0.8 18 1 NOM 5.0 MAX 5.5 V V V mA mA UNIT
1990 Apr 18
5
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