· 16-bit serial I/O shift register· 16-bit parallel-in/serial-out converter· Recirculating serial shifting· Common serial data I/O pin (3-State)

The a 16-bit shift register with serial and parallel load capability and serial output. A single pin serves alternately as an input for serial entry a 3-State serial output. In the serial out mode the data recirculates in the register. Chip Select, Read/Write and Mode inputs provide control flexibility. The 74F674 operates in one of four modes, as indicated in the Function table. Hold: A High signal on the Chip Select (CS) input prevents clocking and forces the Serial Input/Output (SI/O) 3-State buffer into the high impedance state. Serial load: Data present on the SI/O pin shifts into the register on the falling edge of CP. Data enters the Q0 position and shifts toward Q15 on successive clocks. Serial output: The SI/O 3-State buffer is active and the register contents are shifted out from Q15 and simultaneously shifted back into Q0. Parallel load: Data present D0­D15 is entered into the register on the falling edge of CP. The SI/O 3-State buffer is active and represents the Q15 output. To prevent false clocking, CP must be Low during a Low-to-High transition of CS.

DESCRIPTION 24-Pin Plastic Slim DIP (300mil) 24-Pin Plastic SOL COMMERCIAL RANGE VCC 5V ±10%, Tamb N74F674N N74F674D

PINS CP M R/W SI/O Parallel data inputs Chip Select input (active Low) Clock Pulse input (active falling edge) Mode select input Read/Write input Serial data input or Serial 3-state output NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state. DESCRIPTION 74F(U.L.) HIGH/LOW LOAD VALUE HIGH/LOW 70mA/0.6mA 3.0mA/24mA

CONTROL INPUTS CS R/W CP X SI/O STATUS High Z Data in Data out Active OPERATING MODE Hold Serial load Serial output with recirculation Parallel load; no shifting

(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Current applied to output in Low output state Operating free-air temperature range Storage temperature PARAMETER RATING ­0.5 to +VCC to +150 UNIT mA °C

SYMBOL VCC VIH VIL IIK IOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current Operating free-air temperature range 0 PARAMETER LIMITS MIN NOM 5.0 MAX 5.5 UNIT mA °C

(Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS1 MIN VOH High-level output voltage VCC = MIN, VIL = MAX, VIH = MIN, IOH = MAX VCC = MIN, VIL = MAX, VIH = MIN, IOL = MAX VCC = MIN, II = IIK SI/O only others VCC = MAX, = 5.5V VCC = MAX, = 7.0V VCC = MAX, = 2.7V VCC = MAX, = 0.5V SI/O only VCC = MAX, = 2.7V VCC = MAX, = 0.5V VCC = MAX VCC = MAX ±10%VCC ±5%VCC LIMITS TYP2 UNIT MAX µA mA

Low-level output voltage Input clamp voltage Input current at maximum input voltage High-level input current Low-level input current Off-state output current High-level voltage applied Off-state output current Low-level voltage applied Short-circuit output current3 Supply current (total)

NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value under the recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS should be performed last. 1989 Feb 05 3