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Details, datasheet, quote on part number: 74F676
CategoryLogic => Registers => Shift Registers
Description74F676; 16-bit Serial/parallel-in, Serial-out Shift Register (3-State);; Package: SOT137 (SO24), SOT222-1 (DIP24)
CompanyPhilips Semiconductors (Acquired by NXP)
DatasheetDownload 74F676 datasheet
QuoteFind where to buy 74F676


Features, Applications


· 16-bit parallel-to-serial conversion· 16-bit serial-in, serial-out· Chip select control· Power supply current 48mA typical· Shift frequency 110MHz tyical· Available 300mil-wide 24-pin Slim DIP package


The 74F676 contains 16 flip-flops with provision for synchronous parallel or serial entry and serial output. When the mode (M) input is High, information present on the parallel data (D0­D15) inputs is entered on the falling edge of the clock pulse (CP) input signal. When M is Low, data is shifted out of the most significant bit position while information present on the serial (SI) input shifts into the least significant bit position. A High signal on the chip select (CS) input prevents both parallel and serial operations. The 16 bit shift register operates in one of three modes, as indicated in the shift register Function Table. Hold: A High signal on the Chip Select (CS) input prevents clocking and data is stored in the 16 registers. Serial load: Data present on the SI pin shifts into the register on the falling edge of CP. Data enters the Q0 position and shifts toward Q15 on successive clocks finally appearing on the SO pin. Parallel load: Data present D0­D15 is entered into the register on the falling edge of CP. The SO output represents the Q15 register output. To prevent false clocking, CP must be Low during a Low-to-High transition of CS.

DESCRIPTION 24-Pin Plastic Slim DIP (300mil) 24-Pin Plastic SOL COMMERCIAL RANGE VCC 5V ±10%, Tamb N74F676N N74F676D PKG DWG SOT222-1 SOT137-1

PINS M SO Parallel data inputs Serial data input Chip Select input (active Low) Clock Pulse input (active falling edge) Mode select input Serial data output DESCRIPTION 74F(U.L.) HIGH/LOW LOAD VALUE HIGH/LOW 20µA/0.6mA 1mA/20mA

NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.


L H Parallel load High voltage level Low voltage level Don't care High-to-Low transition of clock input

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0-C     D-L     M-R     S-Z     0-C     D-L     M-R     S-Z