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Details, datasheet, quote on part number:74HCT21N
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Datasheet text preview:
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
· The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications · The IC06 74HC/HCT/HCU/HCMOS Logic Package Information · The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT21 Dual 4-input AND gate
Product specification File under Integrated Circuits, IC06 December 1990
Philips Semiconductors
Product specification
Dual 4-input AND gate
FEATURES · Output capability: standard · ICC category: SSI GENERAL DESCRIPTION
74HC/HCT21
The 74HC/HCT21 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT21 provide the 4-input AND function.
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + (CL × VCC2 × fO) where: fi = input frequency in MHz fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in V (CL × VCC2 × fo) = sum of outputs 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V ORDERING INFORMATION See "74HC/HCT/HCU/HCMOS Logic Package Information". PARAMETER propagation delay nA, nB, nC, nD to nY input capacitance power dissipation capacitance per package notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 V 10 3.5 15 HCT 12 3.5 16 ns pF pF UNIT
December 1990
2
Philips Semiconductors
Product specification
Dual 4-input AND gate
PIN DESCRIPTION PIN NO. 1, 9 2, 10 3, 11 4, 12 5, 13 6, 8 7 14 SYMBOL 1A, 2A 1B, 2B n.c. 1C, 2C 1D, 2D 1Y, 2Y GND VCC NAME AND FUNCTION data inputs data inputs not connected data inputs data inputs data outputs ground (0 V) positive supply voltage
74HC/HCT21
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Dual 4-input AND gate
74HC/HCT21
Fig.4 Functional diagram.
Fig.5 Logic diagram (one gate).
FUNCTION TABLE INPUTS nA L X X X H Notes 1. H = HIGH voltage level L = LOW voltage level X = don't care nB X L X X H nC X X L X H nD X X X L H OUTPUT nY L L L L H
December 1990
4
Philips Semiconductors
Product specification
Dual 4-input AND gate
DC CHARACTERISTICS FOR 74HC For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard ICC category: SSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) 74HC SYMBOL PARAMETER +25 min. typ. tPHL/ tPLH propagation delay nA, nB, nC, nD to nY 33 12 10 tTHL/ tTLH output transition time 19 7 6 max. 110 22 19 75 15 13 -40 to+85 min. max. 140 28 24 95 19 16 -40 to+125 min. max. 165 33 28 110 22 19 ns ns UNIT
74HC/HCT21
TEST CONDITIONS VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 Fig.6 WAVEFORMS
Fig.6
December 1990
5
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