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Part: 74HCT4052U

Category:
 Logic
   -> Analog Switches/Multiplexers
             -> Analog Switches

Description: 74HC4052; 74HCT4052; Dual 4-channel Analog Multiplexer, Demultiplexer;; Package: SOT109-3 (SO16), SOT338-1 (SSOP16), SOT38-9 (DIP16), SOT403-1 (TSSOP16)

Company: Philips Semiconductors

Datasheet: Download 74HCT4052U datasheet     File size : 263 kB

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INTEGRATED CIRCUITS

DATA SHEET

74HC4052; 74HCT4052 Dual 4-channel analog multiplexer, demultiplexer
Product specification Supersedes data of 1997 Aug 27 2003 May 16

Philips Semiconductors

Product specification

Dual 4-channel analog multiplexer, demultiplexer
FEATURES · Wide analog input voltage range from -5 V to +5 V · Low ON-resistance: ­ 80 (typical) at VCC - VEE = 4.5 V ­ 70 (typical) at VCC - VEE = 6.0 V ­ 60 (typical) at VCC - VEE = 9.0 V · Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals · Typical "break before make" built in · Complies with JEDEC standard no. 8-1 A · ESD protection: ­ HBM EIA/JESD22-A114-A exceeds 2000 V ­ MM EIA/JESD22-A115-A exceeds 200 V. · Specified from -40 to +85 °C and -40 to +125 °C. APPLICATIONS · Analog multiplexing and demultiplexing · Digital multiplexing and demultiplexing · Signal gating. DESCRIPTION

74HC4052; 74HCT4052

The 74HC4052/74HCT4052 are high-speed Si-gate CMOS devices and are pin compatible with the HEF4052B. They are specified in compliance with JEDEC standard no. 7A. The 74HC4052/74HCT4052 are dual 4-channel analog multiplexers or demultiplexers with common select logic. Each multiplexer has four independent inputs/outputs (pins nY0 to nY3) and a common input/output (pin nZ). The common channel select logics include two digital select inputs (pins S0 and S1) and an active LOW enable input (pin E). When pin E = LOW, one of the four switches is selected (low-impedance ON-state) with pins S0 and S1. When pin E = HIGH, all switches are in the high-impedance OFF-state, independent of pins S0 and S1. VCC and GND are the supply voltage pins for the digital control inputs (pins S0, S1, and E). The VCC to GND ranges are 2.0 to 10.0 V for 74HC4052 and 4.5 to 5.5 V for 74HCT4052. The analog inputs/outputs (pins nY0 to nY3 and nZ) can swing between VCC as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 10.0 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground).

FUNCTION TABLE INPUT(1) CHANNEL BETWEEN E L L L L H Note 1. H = HIGH voltage level L = LOW voltage level X = don't care. S1 L L H H X S0 L H L H X nY0 and nZ nY1 and nZ nY2 and nZ nY3 and nZ none

2003 May 16

2

Philips Semiconductors

Product specification

Dual 4-channel analog multiplexer, demultiplexer
QUICK REFERENCE DATA VEE = GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns.

74HC4052; 74HCT4052

TYPICAL SYMBOL tPZH/tPZL tPHZ/tPLZ CI CPD CS PARAMETER turn-on time E or Sn to Vos turn-off time E or Sn to Vos input capacitance power dissipation capacitance per switch notes 1 and 2 maximum switch capacitance independent (Y) common (Z) Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + [(CL + CS) × VCC2 × fo] where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; CS = maximum switch capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; [(CL + CS) × VCC2 × fo] = sum of the outputs. 2. For 74HC4052 the condition is VI = GND to VCC For 74HCT4052 the condition is VI = GND to VCC - 1.5 V. ORDERING INFORMATION PACKAGE TYPE NUMBER 74HC4052D 74HCT4052D 74HC4052DB 74HCT4052DB 74HC4052N 74HCT4052N 74HC4052PW 74HC4052BQ 74HCT4052BQ TEMPERATURE RANGE -40 to +125 °C -40 to +125 °C -40 to +125 °C -40 to +125 °C -40 to +125 °C -40 to +125 °C -40 to +125 °C -40 to +125 °C -40 to +125 °C PINS 16 16 16 16 16 16 16 16 16 PACKAGE SO16 SO16 SSOP16 SSOP16 DIP16 DIP16 TSSOP16 DHVQFN16 DHVQFN16 MATERIAL plastic plastic plastic plastic plastic plastic plastic plastic plastic CODE SOT109-3 SOT109-3 SOT338-1 SOT338-1 SOT38-9 SOT38-9 SOT403-1 SOT763-1 SOT763-1 CONDITIONS 74HC4052 74HCT4052 CL = 15 pF; RL = 1 k; VCC = 5 V CL = 15 pF; RL = 1 k; VCC = 5 V 28 21 3.5 57 5 12 18 13 3.5 57 5 12 ns ns pF pF pF pF UNIT

2003 May 16

3

Philips Semiconductors

Product specification

Dual 4-channel analog multiplexer, demultiplexer
PINNING PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 2Y0 2Y2 2Z 2Y3 2Y1 E VEE GND S1 S0 1Y3 1Y0 1Z 1Y1 1Y2 VCC SYMBOL

74HC4052; 74HCT4052

DESCRIPTION independent input or output independent input or output common input or output independent input or output independent input or output enable input (active LOW) negative supply voltage ground (0 V) select logic input select logic input independent input or output independent input or output common input or output independent input or output independent input or output positive supply voltage

handbook, halfpage handbook, halfpage

2Y0 1

VCC 16 15 14 13 1Y2 1Y1 1Z 1Y0 1Y3 S0

2Y0 1 2Y2 2 2Z 3 2Y3 4

16 VCC 15 1Y2 14 1Y1 13 1Z

2Y2 2Z 2Y3 2Y1 E VEE

2 3 4

4052
2Y1 5 E6 VEE 7 GND 8
MNB039

GND(1)
5 6 7 8 Top view GND 9 S1
MNB061

12 1Y0 11 1Y3 10 S0

12 11 10

9

S1

(1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input.

Fig.1

Pin configuration DIP16, SO16 and (T)SSOP16.

Fig.2 Pin configuration DHVQFN16.

2003 May 16

4

Philips Semiconductors

Product specification

Dual 4-channel analog multiplexer, demultiplexer

74HC4052; 74HCT4052

handbook, halfpage handbook, halfpage

10 9

13 1Z 1Y0 10 9 S0 S1 1Y1 1Y2 1Y3 2Y0 2Y1 2Y2 6 E 2Z
MNB040

0 1 G4



0 3

12 14 15 11 1 5 2 4

6

MDX 3

0 1 2 3

1 5 2 4 12 14

2Y3

13 15 11
MNB041

3

Fig.3 Logic symbol.

Fig.4 IEC logic symbol.

handbook, full pagewidth

VCC 16 13 12

1Z 1Y0

14

1Y1

15 S0 10 11 LOGIC LEVEL CONVERSION 1 - OF - 4 DECODER

1Y2

1Y3

S1

9

1

2Y0

5 6 2

2Y1

E

2Y2

4 3 8 GND 7
MNB042

2Y3 2Z

VEE

Fig.5 Functional diagram.

2003 May 16

5




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