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Part: 74HC/HCT221
Category:
Logic
-> Schmitt Triggers
-> CMOS/BiCMOS->HC/HCT Family
Description: Dual Non-retriggerable Monostable Multivibrator With Reset
Company: Philips Semiconductors
Datasheet: Download 74HC/HCT221 datasheet File size : 156 kB
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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
· The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications · The IC06 74HC/HCT/HCU/HCMOS Logic Package Information · The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT221 Dual non-retriggerable monostable multivibrator with reset
Product specification Supersedes data of April 1988 File under Integrated Circuits, IC06 December 1990
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
FEATURES · Pulse width variance is typically less than ± 5% · Pin-out identical to "123" · Overriding reset terminates output pulse · nB inputs have hysteresis for improved noise immunity · Output capability: standard (except for nREXT/CEXT) · ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT221 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT221 are dual non-retriggerable monostable multivibrators. Each multivibrator features an active LOW-going edge input (nA) and an active HIGH-going edge input (nB), either of which can be used as an enable input. Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input pulse. Schmitt-trigger input circuitry for the nB inputs allow
74HC/HCT221
jitter-free triggering from inputs with slow transition rates, providing the circuit with excellent noise immunity. Once triggered, the outputs (nQ, nQ) are independent of further transitions of nA and nB inputs and are a function of the timing components. The output pulses can be terminated by the overriding active LOW reset inputs (nRD). Input pulses may be of any duration relative to the output pulse. Pulse width stability is achieved through internal compensation and is virtually independent of VCC and temperature. In most applications pulse stability will only be limited by the accuracy of the external timing components. The output pulse width is defined by the following relationship: tW = CEXTREXTIn2 tW = 0.7CEXTREXT Pin assignments for the "221" are identical to those of the "123" so that the "221" can be substituted for those products in systems not using the retrigger by merely changing the value of REXT and/or CEXT.
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL PARAMETER propagation delay tPHL tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + (CL × VCC2 × fo) + 0.33 × CEXT × VCC2 × fo + D × 28 × VCC where: fi = input frequency in MHz; fo = output frequency in MHz (CL × VCC2 × fo) = sum of outputs CEXT = timing capacitance in pF; CL = output load capacitance in pF VCC = supply voltage in V; D = duty factor in % 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V nA, nB, nRD to nQ, nQ nA, nB, nRD to nQ, nQ input capacitance power dissipation capacitance per package notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 V; REXT = 5 k; CEXT = 0 pF 29 35 3.5 90 HCT 32 36 3.5 96 ns ns pF pF UNIT
December 1990
2
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
ORDERING INFORMATION See "74HC/HCT/HCU/HCMOS Logic Package Information". PIN DESCRIPTION PIN NO. 1, 9 2, 10 3, 11 4, 12 7 8 13, 5 14, 6 15 16 SYMBOL 1A, 2A 1B, 2B 1RD, 2RD 1Q, 2Q 2REXT/CEXT GND 1Q, 2Q 1CEXT, 2CEXT 1REXT/CEXT VCC NAME AND FUNCTION trigger inputs (negative-edge triggered) trigger inputs (positive-edge triggered) direct reset inputs (active LOW) outputs (active LOW) external resistor/capacitor connection ground (0 V) outputs (active HIGH) external capacitor connection external resistor/capacitor connection positive supply voltage
74HC/HCT221
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
FUNCTION TABLE INPUTS nRD L X X H H Notes nA X H X L L nB X X L H H
74HC/HCT221
OUTPUTS nQ L L
(2)
nQ H H (2) H (2)
L (2)
(3)
(3)
1. H = HIGH voltage level L = LOW voltage level X = don't care = LOW-to-HIGH level = HIGH-to-LOW level = one HIGH-level output pulse = one LOW-level output pulse 2. If the monostable was triggered before this condition was established the pulse will continue as programmed. 3. For this combination the reset input must be LOW and the following sequence must be used: pin 1 (or 9) must be set HIGH or pin 2 (or 10) set LOW; then pin 1 (or 9) must be LOW and pin 2 (or 10) set HIGH. Now the reset input goes from LOW-to-HIGH and the device will be triggered.
Fig.4 Functional diagram.
December 1990
4
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
74HC/HCT221
Fig.5 Logic diagram.
Note It is recommended to ground pins 6 (2CEXT) and 14 (1CEXT) externally to pin 8 (GND).
Fig.6 Timing component connections.
December 1990
5
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