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Part: 74LV123N
Category:
Logic
-> Multivibrators/Oscillators
Description: 74LV123; Dual Retriggerable Monostable Multivibrator With Reset;; Package: SOT109-1 (SO16), SOT338-1 (SSOP16), SOT38-1 (DIP16), SOT403-1 (TSSOP16)
Company: Philips Semiconductors
Datasheet: Download 74LV123N datasheet File size : 291 kB
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INTEGRATED CIRCUITS
74LV123 Dual retriggerable monostable multivibrator with reset
Product data Supersedes data of 1998 Apr 20 2003 Mar 13
Philips Semiconductors
Philips Semiconductors
Product data
Dual retriggerable monostable multivibrator with reset
74LV123
FEATURES
· Optimized for Low Voltage applications: 1.0 V to 5.5 V · Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V · Typical VOLP (output ground bounce) 2 V @ VCC = 3.3 V, · DC triggered from active HIGH or active LOW inputs · Retriggerable for very long pulses up to 100% duty factor · Direct reset terminates output pulses · Schmitt-trigger action on all inputs except for the reset input · Output capability: standard (except for nREXT/CEXT) · ICC category: MSI
Tamb = 25 °C Tamb = 25 °C
DESCRIPTION
The 74LV123 is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC/HCT123. The 74LV123 is a dual retriggerable monostable multivibrator with output pulse width control by three methods. The basic pulse time is programmed by selection of an external resistor (REXT) and capacitor (CEXT). They are normally connected as shown in Figure 1. Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made as long as desired. Alternatively, an output delay can be terminated at any time by a LOW-going edge on input nRD, which also inhibits the triggering. Figures 1 and 2 illustrate pulse control by retriggering and early reset. The basic output pulse width is essentially determined by the values of the external timing components REXT and CEXT. For pulse width when CEXT 10,000 pF, the typical output pulse width is defined as: tW = 0.45 × REXT × CEXT (typ.), where tW = pulse width in ns; REXT = external resistor in k; and CEXT = external capacitor in pF. Schmitt-trigger action in the nA and nB inputs makes the circuit highly tolerant of slower input rise and fall times.
QUICK REFERENCE DATA
GND = 0V; Tamb = 25°C; tr = tf v2.5 ns SYMBOL PARAMETER Propagation delay nA, nB to nQ, nQ nRD to nQ, nQ Input capacitance Power dissipation capacitance per monostable VCC = 3.3V, VI = GND to VCC1 CONDITIONS CL = 15 pF VCC = 3.3 V REXT = 5 k CEXT = 0 pF TYPICAL UNIT
tPHL/tPLH CI CP D
25 20 3.5 60
ns ns pF pF
NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where: N = number of outputs switching; fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL × VCC2 × fo) = sum of the outputs.
ORDERING INFORMATION
PACKAGES 16-Pin Plastic DIL 16-Pin Plastic SO 16-Pin Plastic SSOP Type II 16-Pin Plastic TSSOP Type I TEMPERATURE RANGE 40°C to +125°C 40°C to +125°C 40°C to +125°C 40°C to +125°C ORDER CODE 74LV123N 74LV123D 74LV123DB 74LV123PW PKG. DWG. # SOT38-1 SOT109-1 SOT338-1 SOT403-1
2003 Mar 13
2
Philips Semiconductors
Product data
Dual retriggerable monostable multivibrator with reset
74LV123
PIN CONFIGURATION
1A 1B 1RD 1Q 2Q 2CEXT 2REXT/CEXT GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC 1REXT/CEXT 1CEXT 1Q 2Q 2RD 2B 2A
LOGIC SYMBOL
1CEXT 2CEXT 1REXT/CEXT 2REXT/CEXT 14 6 15 7
S
1Q Q 1 9 2 1A 2A 1B 2B T Q 1Q 2Q 2Q
13 5
SV00096
4 12
PIN DESCRIPTION
PIN NUMBER 1,9 2,10 3,11 4, 12 7 8 13, 5 14, 6 15 16 SYMBOL 1A, 2A 1B, 2B 1RD, 2RD 1Q, 2Q 2REXT/CEXT GND 1Q, 2Q 1CEXT, 2CEXT 1REXT/CEXT VCC FUNCTION Trigger inputs (negative-edge triggered) Trigger inputs (positive-edge triggered) Direct reset LOW and trigger action at positive edge Outputs (active LOW) External resistor/capacitor connection Ground (0V) Outputs (active HIGH) External capacitor connection External resistor/capacitor connection Positive supply voltage
10
RD
3 11
1RD 2RD
SV00097
FUNCTIONAL DIAGRAM
1CEXT 2CEXT 1REXT/CEXT 2REXT/CEXT 14 6 15 7
S
1Q Q 2Q
13 5
LOGIC SYMBOL (IEEE/IEC)
14 15 1 2 4 CX RCX 13 &
1 9 2 10
1A 2A 1B 2B T Q 1Q 2Q 4 12
RD
3 3 R 11
1RD 2RD
6 7 9 10
SV00099
CX RCX 5 &
12 11
R
SV00098
2003 Mar 13
3
Philips Semiconductors
Product data
Dual retriggerable monostable multivibrator with reset
74LV123
LOGIC DIAGRAM
nREXT/CEXT VCC
RD
Q
Q R R CL VCC CL
VCC R
CL
CL A
CL
B
R
It is recommended that Pin 6 (2CEXT) and Pin 14 (1CEXT) by externally grounded to Pin 8 (GND)
SV00100
FUNCTION TABLE
INPUTS nRD L X X H H nA X H X L L nB X X L H H
C EXT
OUTPUTS nQ L L* L* nQ H H* H*
VCC
R EXT
NOTES: * If the monostable was triggered before this condition was established, the pulse will continue as programmed. H = HIGH voltage level L = LOW voltage level X = don't care = LOW-to-HIGH transition = HIGH-to-LOW transition = one HIGH level output pulse = one LOW level output pulse
to nCEXT (pin 14 or 6)
to nREXT/CEXT (pin 15 or 7)
SV00101
Figure 1. Timing component connection
2003 Mar 13
4
Philips Semiconductors
Product data
Dual retriggerable monostable multivibrator with reset
74LV123
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VI VO Tamb DC supply voltage Input voltage Output voltage Operating ambient temperature range in free air See DC and AC characteristics VCC = 1.0 V to 2.0 V tr, tf Input rise and fall times except for Schmitt-trigger gg inputs VCC = 2.0 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 3.6 V to 5.5 V PARAMETER CONDITIONS See Note1 MIN 1.0 0 0 40 40 TYP 3.3 MAX 5.5 VCC VCC +85 +125 500 200 100 50 UNIT V V V °C ns/V ns/V ns/V ns/V
NOTE: 1. The LV is guaranteed to function down to VCC = 1.0 V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2 V to VCC = 5.5 V.
ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). SYMBOL VCC ±IIK ±IOK ±IO ±IGND, ±ICC Tstg PTOT PARAMETER DC supply voltage DC input diode current DC output diode current DC output source or sink current (standard outputs) DC VCC or GND current for types with standard outputs Storage temperature range Power dissipation per package plastic DIL plastic mini-pack (SO) plastic shrink mini-pack (SSOP and TSSOP) for temperature range: 40 °C to +125 °C above +70 °C derate linearly with 12 mW/K above +70 °C derate linearly with 8 mW/K above +60 °C derate linearly with 5.5 mW/K VI VCC + 0.5 V VO VCC + 0.5 V 0.5 V < VO < VCC + 0.5 V CONDITIONS RATING 0.5 to +7.0 20 50 25 50 65 to +150 750 500 500 UNIT V mA mA mA mA °C
mW
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2003 Mar 13
5
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