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Part: 74LV138
Category:
Logic
-> Decoders/Demultiplexers
Description: 74LV138; 3-to-8 Line Decoder/multiplexer; Inverting;; Package: SOT109 (SO16), SOT338-1 (SSOP16), SOT38-4 (DIP16), SOT403-1 (TSSOP16)
Company: Philips Semiconductors
Datasheet: Download 74LV138 datasheet File size : 291 kB
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Datasheet text preview:
INTEGRATED CIRCUITS
74LV138 3-to-8 line decoder/multiplexer; inverting
Product specification Supersedes data of 1997 Feb 03 IC24 Data Handbook 1998 Apr 28
Philips Semiconductors
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74LV138
FEATURES
· Wide operating voltage: 1.0 to 5.5 V · Optimized for low voltage applications: 1.0 to 3.6 V · Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V · Typical VOLP (output ground bounce) 2 V at VCC = 3.3 V, · Demultiplexing capability · Multiple input enable for easy expansion · Ideal for memory chip select decoding · Active LOW mutually exclusive outputs · Output capability: standard · ICC category: MSI
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf 2.5 ns SYMBOL tPHL/tPLH CI CP D PARAMETER Propagation delay An to Yn, E3 to Yn, En to Yn Input capacitance Power dissipation capacitance per package Tamb = 25°C Tamb = 25°C
DESCRIPTION
The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT138. The 74LV138 accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y0 to Y7). The 74LV138 features three enable inputs: two active LOW (E1, and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the 74LV138 to a 1-of-32 (5 lines to 32 lines) decoder with just four 74LV138 ICs and one inverter. The 74LV138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state. The 74LV138 is identical to the 74LV238 but has non-inverting (true) outputs.
CONDITIONS CL = 15 pF; VCC = 3.3 V
TYPICAL 12 14 3.5
UNIT ns ns pF pF
VCC = 3.3 V VI = GND to VCC1
45
NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi ) (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL × VCC2 × fo) = sum of the outputs.
ORDERING INFORMATION
PACKAGES 16-Pin Plastic DIL 16-Pin Plastic SO 16-Pin Plastic SSOP Type II 16-Pin Plastic TSSOP Type I TEMPERATURE RANGE 40°C to +125°C 40°C to +125°C 40°C to +125°C 40°C to +125°C OUTSIDE NORTH AMERICA 74LV138 N 74LV138 D 74LV138 DB 74LV138 PW NORTH AMERICA 74LV138 N 74LV138 D 74LV138 DB 74LV138PW DH PKG. DWG. # SOT38-4 SOT109-1 SOT338-1 SOT403-1
PIN CONFIGURATION
A0 A1 A2 E1 E2 E3 Y7 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC Y0 Y1 Y2 Y3 Y4 Y5 Y6
PIN DESCRIPTION
PIN NUMBER 1, 2, 3 4, 5 6 SYMBOL A0 to A2 E1 to E2 E3 FUNCTION Address inputs Enable inputs (active LOW) Enable inputs (active HIGH) Outputs Ground (0 V) Positive supply voltage
15, 14, 13, 12, Y0 to Y7 11, 10, 9, 7 8 16 GND VCC
SV00524
1998 Apr 28
2
8531903 19290
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74LV138
LOGIC DIAGRAM
1 2 3 A0 A1 A2 Y0 Y1 Y2 Y3 Y4 4 E1 5 6 Y7 7 E2 E3 Y6 9 Y5 10 15 14 13 12
LOGIC SYMBOL (IEEE/IEC)
DX 0 1 0 G 0 7 15 1 2 1 X Y 0 15 14 13 12
1 2 3
14 13 12
1
2 3 2
2
2 3
3
4
11
4
11
4
11
4
&
5
10
4
&
5
10
5
6
9
5 EN
6
9
6
7
7
6 (b)
7
7
SV00525
(a)
SV00526
FUNCTIONAL DIAGRAM
Y0 A0 A1 A2 3-to-8 DECODER ENABLE EXITING Y1 14 Y2 13 Y3 12 Y4 11 Y5 10 Y6 Y7 E1 4 5 6 E2 E3 9 7 2 3 15
1
SV00527
FUNCTION TABLE
INPUTS E1 H X X L L L L L L L L E2 X H X L L L L L L L L E3 X X L H H H H H H H H A0 X X X L H L H L H L H A1 X X X L L H H L L H H A2 X X X L L L L H H H H Y0 H H H L H H H H H H H Y1 H H H H L H H H H H H Y2 H H H H H L H H H H H OUTPUTS Y3 H H H H H H L H H H H Y4 H H H H H H H L H H H Y5 H H H H H H H H L H H Y6 H H H H H H H H H L H Y7 H H H H H H H H H H L
NOTES: H = HIGH voltage level L = LOW voltage level X = don't care 1998 Apr 28 3
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74LV138
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VI VO Tamb PARAMETER DC supply voltage Input voltage Output voltage Operating ambient temperature range in free air See DC and AC characteristics VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V to 5.5V CONDITIONS See Note 1 MIN 1.0 0 0 40 40 TYP 3.3 MAX 5.5 VCC VCC +85 +125 500 200 100 50 UNIT V V V °C
tr, tf
Input rise and fall times
ns/V
NOTE: 1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.
ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). SYMBOL VCC "IIK "IOK "IO "IGND, "ICC Tstg PARAMETER DC supply voltage DC input diode current DC output diode current DC output source or sink current standard outputs DC VCC or GND current for types with standard outputs Storage temperature range Power dissipation per package plastic DIL plastic mini-pack (SO) plastic shrink mini-pack (SSOP and TSSOP) for temperature range: 40 to +125°C above +70°C derate linearly with 12 mW/K above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K VI VCC + 0.5V VO VCC + 0.5V 0.5V < VO < VCC + 0.5V CONDITIONS RATING 0.5 to +7.0 20 50 25 UNIT V mA mA mA
50 65 to +150 750 500 400
mA °C
PTOT
mW
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Apr 28
4
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74LV138
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0 V). LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN VCC = 1.2 V VIH HIGH level Input voltage VCC = 2.0 V VCC = 2.7 to 3.6 V VCC = 4.5 to 5.5 V VCC = 1.2 V VIL LOW level Input voltage VCC = 2.0 V VCC = 2.7 to 3.6 V VCC = 4.5 to 5.5 VCC = 1.2 V; VI = VIH or VIL; IO = 100µA VCC = 2.0 V; VI = VIH or VIL; IO = 100µA VOH HIGH l level output ltt all out voltage; all outputs VCC = 2.7 V; VI = VIH or VIL; IO = 100µA VCC = 3.0 V; VI = VIH or VIL; IO = 100µA VCC = 4.5 V; VI = VIH or VIL; IO = 100µA VOH HIGH level output voltage; STANDARD outputs VCC = 3.0 V; VI = VIH or VIL; IO = 6mA VCC = 4.5 V; VI = VIH or VIL; IO = 12mA VCC = 1.2 V; VI = VIH or VIL; IO = 100µA VCC = 2.0 V; VI = VIH or VIL; IO = 100µA VOL LOW l ltt level output all out voltage; all outputs VCC = 2.7 V; VI = VIH or VIL; IO = 100µA VCC = 3.0 V; VI = VIH or VIL; IO = 100µA VCC = 4.5 V; VI = VIH or VIL; IO = 100µA VOL LOW level output voltage; STANDARD outputs Input leakage current Quiescent supply current; MSI Additional quiescent supply current per input VCC = 3.0 V; VI = VIH or VIL; IO = 6mA VCC = 4.5 V; VI = VIH or VIL; IO = 12mA VCC = 5.5 V; VI = VCC or GND VCC = 5.5 V; VI = VCC or GND; IO = 0 VCC = 2.7 V to 3.6 V; VI = VCC 0.6 V 1.8 2.5 2.8 4.3 2.40 3.60 1.2 2.0 2.7 3.0 4.5 2.82 4.20 0 0 0 0 0 0.25 0.35 0.2 0.2 0.2 0.2 0.40 0.55 1.0 20.0 500 0.2 0.2 0.2 0.2 0.50 V 0.65 1.0 160 850 µA µA µA V 1.8 2.5 2.8 4.3 2.20 V 3.50 V 0.9 1.4 2.0 0.7
II ICC ICC
NOTE: 1. All typical values are measured at Tamb = 25°C.
1998 Apr 28
5
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