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Part: 74LV393PWDH

Category:

Description: 74LV393; Dual 4-bit Binary Ripple Counter

Company: Philips Semiconductors

Datasheet: Download 74LV393PWDH datasheet     File size : 291 kB

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INTEGRATED CIRCUITS

74LV393 Dual 4-bit binary ripple counter
Product specification Supersedes data of 1997 Mar 04 IC24 Data Handbook 1997 Jun 10

Philips Semiconductors

Philips Semiconductors

Product specification

Dual 4-bit binary ripple counter

74LV393

FEATURES

· Optimized for Low Voltage applications: 1.0 to 3.6V · Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V · Typical VOLP (output ground bounce) t 0.8V @ VCC = 3.3V, · Typical VOHV (output VOH undershoot) u 2V @ VCC = 3.3V, · Two 4-bit binary counters with individual clocks · Divide-by any binary module up to 28 in one package · Two master resets to clear each 4-bit counter individually · Output capability: standard · ICC category: MSI
QUICK REFERENCE DATA
GND = 0V; Tamb = 25°C; tr = tf v2.5 ns SYMBOL tPHL/tPLH fmax CI CP D PARAMETER Propagation delay nCP to nQ0 nQ to nQn+1 nMR to nQn Maximum clock frequency Input capacitance Power dissipation capacitance per flip-flop Tamb = 25°C Tamb = 25°C

DESCRIPTION
The 74LV393 is a low­voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT393. The 74LV393 is a dual 4-bit binary ripple counter with separate clocks (1CP, 2CP) and master reset (1MR, 2MR) inputs to each counter. The operation of each half of the ``393'' is the same as the ``93'' except no external clock connections are required. The counters are triggered by a HIGH-to-LOW transition of the clock inputs. The counter outputs are internally connected to provide clock inputs to succeeding stages. The outputs of the ripple counter do not change synchronously and should not be used for high-speed address decoding. The master resets are active-HIGH asynchronous inputs to each 4-bit counter identified by the ``1'' and ``2'' in the pin description. A HIGH level on the nMR input overrides the clock and sets the outputs LOW.

CONDITIONS

TYPICAL 12 4 11 99 3.5

UNIT ns MHz pF pF

CL = 15pF VCC = 3.3V

VI = GND to VCC

1

23

NOTE: 1. CPD is used to determine the dynamic power dissipation (PD in µW) VCC2 fi )S (CL VCC2 fo) where: PD = CPD fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; VCC2 fo) = sum of the outputs. S (CL

ORDERING INFORMATION
PACKAGES 14-Pin Plastic DIL 14-Pin Plastic SO 14-Pin Plastic SSOP Type II 14-Pin Plastic TSSOP Type I TEMPERATURE RANGE ­40°C to +125°C ­40°C to +125°C ­40°C to +125°C ­40°C to +125°C OUTSIDE NORTH AMERICA 74LV393 N 74LV393 D 74LV393 DB 74LV393 PW NORTH AMERICA 74LV393 N 74LV393 D 74LV393 DB 74LV393PW DH PKG. DWG. # SOT27-1 SOT108-1 SOT337-1 SOT402-1

PIN CONFIGURATION
1CP 1MR 1Q0 1Q1 1Q2 1Q3 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC 2CP

PIN DESCRIPTION
PIN NUMBER 1, 13
2MR 2Q0 2Q1 2Q2 2Q3

SYMBOL 1CP, 2CP 1MR, 2MR 1Q0 to 1Q3 2Q0 to 2Q3 GND VCC

FUNCTION Clock inputs (HIGH-to-LOW, edge-triggered) Asynchronous master reset inputs (active HIGH) Flip-flop outputs Ground (0V) Positive supply voltage

2, 12 3, 4, 5, 6 11, 10, 9, 8 7 14

SV00672

1998 Jun 10

2

853­1936 19545

Philips Semiconductors

Product specification

Dual 4-bit binary ripple counter

74LV393

LOGIC SYMBOL

FUNCTIONAL DIAGRAM
1Q0 4­BIT BINARY RIPPLE 1Q2 2 1MR 1Q3 5 2 6 1MR COUNTER 1Q1 1Q2 1Q3

1 1 1CP 1Q0 1Q1 3 4

1CP

3 4 5 6

1

13 13 2CP 2Q0 2Q1 2Q2 12 2MR 2Q3 11 10 9 8 12

2CP 4­BIT BINARY RIPPLE 2MR COUNTER

2Q0 2Q1 2Q2 2Q3

11 10 9 8

2

SV00673

SV00675

LOGIC SYMBOL (IEEE/IEC)
CTR4 0 2 1 CT=0 CT + 3 3 4 5 6

STATE DIAGRAM
0 1 2 3 4

15

5

14

6

13

7

CTR4 0 12 13 CT=0 CT + 3 11 10 9 8

12

11

10

9

8

SV00676

COUNT SEQUENCE FOR 1 COUNTER
COUNT 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 OUTPUTS Q0 L H L H L H L H L H L H L H L H Q1 L L H H L L H H L L H H L L H H Q2 L L L L H H H H L L L L H H H H Q3 L L L L L L L L H H H H H H H H

SV00674

1998 Jun 10

3

Philips Semiconductors

Product specification

Dual 4-bit binary ripple counter

74LV393

LOGIC DIAGRAM
Q Q Q Q

CP

T

FF1

T

FF2

T

FF3

T

FF4

RD

RD

RD

RD

MR

Q0

Q1

Q2

Q3

SV00677

RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VI VO Tamb tr, tf Input voltage Output voltage Operating ambient temperature range in free air Input rise and fall times See DC and AC characteristics VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V PARAMETER DC supply voltage CONDITIONS See Note 1 MIN 1.0 0 0 ­40 ­40 ­ ­ ­ ­ ­ ­ TYP 3.3 ­ ­ MAX 3.6 VCC VCC +85 +125 500 200 100 UNIT V V V °C ns/V

NOTES: 1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC =3.6V.

ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0V). SYMBOL VCC ±IIK ±IOK ±IO ±IGND, ±ICC Tstg PTOT PARAMETER DC supply voltage DC input diode current DC output diode current DC output source or sink current ­ standard outputs DC VCC or GND current for types with ­ standard outputs Storage temperature range Power dissipation per package ­ plastic DIL ­ plastic mini-pack (SO) ­ plastic shrink mini-pack (SSOP and TSSOP) for temperature range: ­40 to +125°C above +70°C derate linearly with 12 mW/K above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K VI VCC + 0.5V VO VCC + 0.5V ­0.5V < VO < VCC + 0.5V CONDITIONS RATING ­0.5 to +4.6 20 50 25 50 ­65 to +150 750 500 400 UNIT V mA mA mA mA °C mW

NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

1998 Jun 10

4

Philips Semiconductors

Product specification

Dual 4-bit binary ripple counter

74LV393

DC CHARACTERISTICS FOR THE LV FAMILY
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V). LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN VCC = 1.2V VIH HIGH l level I l Input t voltage VCC = 2.0V VCC = 2.7 to 3.6V VCC = 1.2V VIL LOW l level I l Input t voltage VCC = 2.0V VCC = 2.7 to 3.6V VCC = 1.2V; VI = VIH or VIL; ­IO = 100µA HIGH level output voltage; all outputs VOH HIGH level output voltage; STANDARD outputs VCC = 2.0V; VI = VIH or VIL; ­IO = 100µA VCC = 2.7V; VI = VIH or VIL; ­IO = 100µA VCC = 3.0V; VI = VIH or VIL; ­IO = 100µA VCC = 3.0V; VI = VIH or VIL; ­IO = 6mA VCC = 1.2V; VI = VIH or VIL; IO = 100µA LOW level output voltage; all outputs VOL LOW level output voltage; STANDARD outputs II ICC ICC Input leakage current Quiescent supply current; MSI Additional quiescent supply current per input VCC = 2.0V; VI = VIH or VIL; IO = 100µA VCC = 2.7V; VI = VIH or VIL; IO = 100µA VCC = 3.0V; VI = VIH or VIL; IO = 100µA VCC = 3.0V; VI = VIH or VIL; IO = 6mA 1.8 2.5 2.8 2.40 1.2 2.0 2.7 3.0 2.82 0 0 0 0 0.25 0.2 0.2 0.2 0.40 0.2 0.2 0.2 0.50 V 1.8 2.5 2.8 2.20 V 0.9 1.4 2.0 0.3 0.6 0.8 -40°C to +85°C TYP1 MAX -40°C to +125°C MIN 0.9 1.4 2.0 0.3 0.6 0.8 V V MAX UNIT

VCC = 3.6V; VI = VCC or GND VCC = 3.6V; VI = VCC or GND; IO = 0 VCC = 2.7V to 3.6V; VI = VCC ­ 0.6V

1.0 20.0 500

1.0 160 850

µA µA µA

NOTE: 1. All typical values are measured at Tamb = 25°C.

1998 Jun 10

5




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