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Details, datasheet, quote on part number:74LVC125AD
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| Part: | 74LVC125AD |
| Category: | Logic => Buffers/Drivers |
| Description: | 74LVC125A; Quad Buffer/line Driver With 5 V Tolerant Input/outputs; 3-state;; Package: SOT108-1 (SO14), SOT337-1 (SSOP14), SOT402-1 (TSSOP14) |
| Company: | Philips Semiconductors |
| Datasheet: | Download 74LVC125AD datasheet File size : 106 kB |
| Request For quote: | Find where to buy 74LVC125AD
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Datasheet text preview:
INTEGRATED CIRCUITS
DATA SHEET
74LVC125A Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
Product specification Supersedes data of 2002 Mar 08 2003 May 07
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
FEATURES · 5 V tolerant inputs/outputs for interfacing with 5 V logic · Wide supply voltage range from 1.2 to 3.6 V · CMOS low power consumption · Direct interface with TTL levels · Inputs accept voltages up to 5.5 V · Complies with JEDEC standard no. 8-1A · ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V · Specified from -40 to +85 °C and -40 to +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf 2.5 ns. SYMBOL tPHL/tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; (CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. ORDERING INFORMATION PACKAGES TYPE NUMBER TEMPERATURE RANGE 74LVC125AD 74LVC125ADB 74LVC125APW 74LVC125ABQ -40 to +125 °C -40 to +125 °C -40 to +125 °C -40 to +125 °C PINS 14 14 14 14 PACKAGE SO14 SSOP14 TSSOP14 DHVQFN14 PARAMETER propagation delay nA to nY input capacitance power dissipation capacitance per gate VCC = 3.3 V; notes 1 and 2 CONDITIONS DESCRIPTION
74LVC125A
The 74LVC125A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. The 74LVC125A consists of four non-inverting buffers/line drivers with 3-state outputs (nY) which are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a high-impedance OFF-state.
TYPICAL ns pF pF 4.0 12
UNIT
CL = 50 pF; VCC = 3.3 V 2.4
MATERIAL plastic plastic plastic plastic
CODE SOT108-1 SOT337-1 SOT402-1 SOT762-1
2003 May 07
2
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
FUNCTION TABLE See note 1. INPUT nOE L L H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don't care; Z = high-impedance OFF-state. PINNING PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SYMBOL 1OE 1A 1Y 2OE 2A 2Y GND 3Y 3A 3OE 4Y 4A 4OE VCC DESCRIPTION data enable input (active LOW) data input data output data enable input (active LOW) data input data output ground (0 V) data output data input data enable input (active LOW) data output data input data enable input (active LOW) supply voltage
2A 2Y GND 5 6 7
MNA226
74LVC125A
OUTPUT nA L H X nY L H Z
1OE 1A 1Y 2OE
1 2 3 4
14 VCC 13 4OE 12 4A
125
11 4Y 10 3OE 9 3A
8 3Y
Fig.1 Pin configuration SO14 and (T)SSOP14.
2003 May 07
3
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
74LVC125A
handbook, halfpage
1OE 1
VCC 14 13 12 4OE 4A 4Y
handbook, halfpage
2 1 5 4
11 10 9
1A 1OE 2A 2OE 3A 3OE 4A 4OE
1Y
3
1A 1Y 2OE 2A 2Y
2 3 4 5 6 7 Top view GND 8 3Y
2Y
6
GND(1)
9
3OE
3Y
8
10
3A
12 13
4Y
11
MCE181
MNA228
(1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input.
Fig.2 Pin configuration DHVQFN14.
Fig.3 Logic symbol.
handbook, halfpage
2 1 5 EN1
1
3
6 4 9 8 10 12 11 13
MNA229
handbook, halfpage
nA
nY
nOE
MNA227
Fig.4 Logic symbol (IEEE/IEC).
Fig.5 Logic diagram.
2003 May 07
4
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO Tamb tr, tf PARAMETER supply voltage input voltage output voltage operating ambient temperature input rise and fall times VCC = 1.2 to 2.7 V VCC = 2.7 to 3.6 V output HIGH or LOW state output 3-state CONDITIONS for maximum speed performance for low voltage applications MIN. 2.7 1.2 0 0 0 -40 0 0
74LVC125A
MAX. 3.6 3.6 5.5 VCC 5.5 +125 20 10 V V V V V
UNIT
°C ns/V ns/V
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO IO ICC, IGND Tstg Ptot Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. For SO14 packages: above 70 °C derate linearly with 8 mW/K. For SSOP14 and TSSOP14 packages: above 60 °C derate linearly with 5.5 mW/K. For DHVQFN14 packages: above 60 °C derate linearly with 4.5 mW/K. PARAMETER supply voltage input diode current input voltage output diode current output voltage output source or sink current VCC or GND current storage temperature power dissipation Tamb = -40 to +125 °C; note 2 VI VCC or VO < 0 output HIGH or LOW state; note 1 output 3-state; note 1 VO = 0 to VCC CONDITIONS - -0.5 - -0.5 -0.5 - - -65 - MIN. -0.5 MAX. +6.5 -50 +6.5 ±50 +6.5 ±50 ±100 +150 500 V mA V mA V mA mA °C mW UNIT
VCC + 0.5 V
2003 May 07
5
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