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Details, datasheet, quote on part number:74LVC138ADB
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| Part: | 74LVC138ADB |
| Category: | Logic => Decoders/Demultiplexers |
| Description: | 74LVC138A; 3-to-8 Line Decoder/demultiplexer; Inverting;; Package: SOT109-1 (SO16), SOT338-1 (SSOP16), SOT403-1 (TSSOP16) |
| Company: | Philips Semiconductors |
| Datasheet: | Download 74LVC138ADB datasheet File size : 108 kB |
| Request For quote: | Find where to buy 74LVC138ADB
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Datasheet text preview:
INTEGRATED CIRCUITS
DATA SHEET
74LVC138A 3-to-8 line decoder/demultiplexer; inverting
Product specification Supersedes data of 2002 Mar 12 2003 May 06
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
FEATURES · 5 V tolerant inputs for interfacing with 5 V logic · Wide supply voltage range from 1.2 to 3.6 V · CMOS low power consumption · Direct interface with TTL levels · Inputs accept voltages up to 5.5 V · Demultiplexing capability · Multiple input enable for easy expansion · Ideal for memory chip select decoding · Active LOW mutually exclusive outputs · Output drive capability 50 transmission lines at 125 °C · Complies with JEDEC standard no. 8-1A · ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. · Specified from -40 to +85 °C and -40 to +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf 2.5 ns. SYMBOL tPHL/tPLH PARAMETER propagation delay An to Yn propagation delay E3 to Yn propagation delay En to Yn CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total switching outputs; (CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. input capacitance power dissipation capacitance per gate VCC = 3.3 V; notes 1 and 2 CONDITIONS CL = 50 pF; VCC = 3.3 V CL = 50 pF; VCC = 3.3 V CL = 50 pF; VCC = 3.3 V DESCRIPTION
74LVC138A
The 74LVC138A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The 74LVC138A accepts three binary weighted address inputs (A0, A1 and A2) and when enabled, provides 8 mutually exclusive active LOW outputs (Y0 to Y7). The 74LVC138A features three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the 74LVC138A to a 1-of-32 (5 to 32 lines) decoder with just four 74LVC138A ICs and one inverter. The 74LVC138A can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state.
TYPICAL 2.6 2.8 2.7 4.0 21 ns ns ns pF pF
UNIT
2003 May 06
2
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
ORDERING INFORMATION PACKAGE TYPE NUMBER TEMPERATURE RANGE 74LVC138AD 74LVC138ADB 74LVC138APW 74LVC138ABQ FUNCTION TABLE See note 1. INPUT E1 H X X L L L L L L L L Note 1. H = HIGH voltage level; L = LOW voltage level; X = don't care. E2 X H X L L L L L L L L E3 X X L H H H H H H H H A0 X X X L H L H L H L H A1 X X X L L H H L L H H A2 X X X L L L L H H H H Y0 H H H L H H H H H H H Y1 H H H H L H H H H H H Y2 H H H H H L H H H H H OUTPUT Y3 H H H H H H L H H H H Y4 H H H H H H H L H H H -40 to +125 °C -40 to +125 °C -40 to +125 °C -40 to +125 °C PINS 16 16 16 16 PACKAGE SO16 SSOP16 TSSOP16 DHVQFN16
74LVC138A
MATERIAL plastic plastic plastic plastic
CODE SOT109-1 SOT338-1 SOT403-1 SOT763-1
Y5 H H H H H H H H L H H
Y6 H H H H H H H H H L H
Y7 H H H H H H H H H H L
2003 May 06
3
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
PINNING PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 A0 A1 A2 E1 E2 E3 Y7 GND Y6 Y5 Y4 Y3 Y2 Y1 Y0 VCC SYMBOL address input address input address input enable input (active LOW) enable input (active LOW) enable input (active HIGH) output ground (0 V) output output output output output output output supply voltage DESCRIPTION
74LVC138A
handbook, halfpage
handbook, halfpage
A0 1
VCC 16 15 14 13 Y0 Y1 Y2 Y3 Y4 Y5
A0 1 A1 2 A2 3 E1 4
16 VCC 15 Y0 14 Y1 13 Y2
A1 A2 E1 E2 E3
2 3 4
138
E2 5 E3 6 Y7 7 GND 8
MNA369
12 Y3 11 Y4
GND(1)
5 6 7 8 Top view GND 9 Y6
MCE177
12 11 10
10 Y5 9 Y6
Y7
(1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input.
Fig.1 Pin configuration SO16 and (T)SSOP16.
Fig.2 Pin configuration DHVQFN16.
2003 May 06
4
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74LVC138A
handbook, halfpage handbook, halfpage
DX
0 1
15 14 13 12 11 10 9 7 4 5 6 & 1 2 3 1 2 4
X/Y
0 1 2 3 4 5 6
15 14 13 12 11 10 9 7
1 2 3
A0 A1 A2
Y0 Y1 Y2 Y3
15 14 13 12 11 10 9 7
1 2 3
0 G 2 0 7
2 3 4
4 5 6
E1 E2 E3
Y4 Y5 Y6 Y7
MNA370
4 5 6
&
5 6 7
EN 7
MNA371
(a)
(b)
Fig.3 Logic symbol.
Fig.4 Logic symbol (IEEE/IEC).
handbook, halfpage
Y0 1 2 3 A0 A1 A2 3-to-8 DECODER ENABLE EXITING Y1 Y2 Y3 Y4 Y5 Y6 Y7 4 5 6 E1 E2 E3
MNA372
15 14 13 12 11 10 9 7
Fig.5 Functional diagram.
2003 May 06
5
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