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Part: 74LVC1G38GM
Category:
Logic
-> Gates
-> NAND Gates
Description: 2-input NAND gate (open drain)<<<>>>The 74LVC1G38 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. <<<>>><<<>>>Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device as translator in a mixed 3.3 V and 5 V environment. <<<>>><<<>>>This device is fully specified for partial power-down applications using Ioff . The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. <<<>>><<<>>>The 74LVC1G38 provides the 2-input NAND function. <<<>>><<<>>> <<<>>>Features<<<>>>Wide supply voltage range from 1.65 V to 5.5 V <<<>>>5 V tolerant outputs for interfacing with 5 V logic <<<>>>High noise immunity <<<>>>Complies with JEDEC standard: <<<>>>JESD8-7 (1.65 V to 1.95 V) <<<>>>JESD8-5 (2.3 V to 2.7 V) <<<>>>JESD8-B/JESD36 (2.7 V to 3.6 V). <<<>>>ESD protection: <<<>>>HBM EIA/JESD22-A114-B exceeds 2000 V <<<>>>MM EIA/JESD22-A115-A exceeds 200 V. <<<>>>+-24 mA output drive (VCC = 3.0 V) <<<>>>CMOS low power consumption <<<>>>Open drain outputs <<<>>>Latch-up performance exceeds 250 mA <<<>>>Direct interface with TTL levels <<<>>>Inputs accept voltages up to 5 V <<<>>>Multiple package options <<<>>>Specified from -40 Cel to +125 Cel.
Company: Philips Semiconductors
Datasheet: Download 74LVC1G38GM datasheet File size : 78 kB
Request For quote: Find where to buy 74LVC1G38GM
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